Don't apply this transform to vectors. Fixes PR2756.
authorNick Lewycky <nicholas@mxc.ca>
Wed, 3 Sep 2008 06:24:21 +0000 (06:24 +0000)
committerNick Lewycky <nicholas@mxc.ca>
Wed, 3 Sep 2008 06:24:21 +0000 (06:24 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55690 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Transforms/Scalar/InstructionCombining.cpp

index 17c0750346a7ac48c2effa6f4afa2aabdad8fded..aedad72037ea545798a8033e00f7f86af6909d0e 100644 (file)
@@ -2948,8 +2948,9 @@ Instruction *InstCombiner::visitSRem(BinaryOperator &I) {
     return common;
   
   if (Value *RHSNeg = dyn_castNegVal(Op1))
-    if (!isa<ConstantInt>(RHSNeg) || 
-        cast<ConstantInt>(RHSNeg)->getValue().isStrictlyPositive()) {
+    if (!isa<Constant>(RHSNeg) ||
+        (isa<ConstantInt>(RHSNeg) &&
+         cast<ConstantInt>(RHSNeg)->getValue().isStrictlyPositive())) {
       // X % -Y -> X % Y
       AddUsesToWorkList(I);
       I.setOperand(1, RHSNeg);
@@ -5495,7 +5496,7 @@ Instruction *InstCombiner::visitICmpInst(ICmpInst &I) {
       if (Op0I->getOpcode() == Op1I->getOpcode() && Op0I->hasOneUse() &&
           Op1I->hasOneUse() && Op0I->getOperand(1) == Op1I->getOperand(1) &&
           I.isEquality()) {
-       switch (Op0I->getOpcode()) {
+        switch (Op0I->getOpcode()) {
         default: break;
         case Instruction::Add:
         case Instruction::Sub: