#include <linux/regulator/rk29-pwm-regulator.h>
#include <linux/regulator/machine.h>
+#include <linux/mfd/wm831x/pdata.h>
+#include <linux/mfd/wm831x/core.h>
+#include <linux/mfd/wm831x/gpio.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
};
#endif
+#if defined(CONFIG_GPIO_WM831X)
+struct rk2818_gpio_expander_info wm831x_gpio_settinginfo[] = {
+ {
+ .gpio_num =WM831X_P01,// tp3
+ .pin_type = GPIO_OUT,
+ .pin_value =GPIO_HIGH,
+ },
+
+ {
+ .gpio_num =WM831X_P02,//tp4
+ .pin_type = GPIO_OUT,
+ .pin_value =GPIO_HIGH,
+ },
+ {
+ .gpio_num =WM831X_P03,//tp2
+ .pin_type = GPIO_OUT,
+ .pin_value =GPIO_HIGH,
+ },
+ {
+ .gpio_num =WM831X_P04,//tp1
+ .pin_type = GPIO_OUT,
+ .pin_value =GPIO_HIGH,
+ },
+ {
+ .gpio_num =WM831X_P05,//tp1
+ .pin_type = GPIO_OUT,
+ .pin_value =GPIO_HIGH,
+ },
+ {
+ .gpio_num =WM831X_P06,//tp1
+ .pin_type = GPIO_OUT,
+ .pin_value =GPIO_HIGH,
+ },
+ {
+ .gpio_num =WM831X_P07,//tp1
+ .pin_type = GPIO_OUT,
+ .pin_value =GPIO_HIGH,
+ },
+ {
+ .gpio_num =WM831X_P08,//tp1
+ .pin_type = GPIO_OUT,
+ .pin_value =GPIO_HIGH,
+ },
+ {
+ .gpio_num =WM831X_P09,//tp1
+ .pin_type = GPIO_OUT,
+ .pin_value =GPIO_HIGH,
+ },
+ {
+ .gpio_num =WM831X_P10,//tp1
+ .pin_type = GPIO_OUT,
+ .pin_value =GPIO_HIGH,
+ },
+ {
+ .gpio_num =WM831X_P11,//tp1
+ .pin_type = GPIO_OUT,
+ .pin_value =GPIO_HIGH,
+ },
+ {
+ .gpio_num =WM831X_P12,
+ .pin_type = GPIO_OUT,
+ .pin_value =GPIO_HIGH,
+ },
+};
+
+#endif
+
+
+
+#if defined(CONFIG_MFD_WM831X)
+
+int wm831x_pre_init(struct wm831x *parm)
+{
+ int ret;
+ printk("%s\n", __FUNCTION__);
+
+ //ILIM = 900ma
+ ret = wm831x_reg_read(parm, WM831X_POWER_STATE) & 0xffff;
+ wm831x_reg_write(parm, WM831X_POWER_STATE, (ret&0xfff8) | 0x04);
+#if 0
+ wm831x_set_bits(parm, WM831X_LDO_ENABLE, (1 << 3), 0);
+ wm831x_set_bits(parm, WM831X_LDO_ENABLE, (1 << 7), 0);
+ printk("%s:disable ldo4 and ldo8 because they are enabled in uboot\n",__FUNCTION__);
+#endif
+ return 0;
+}
+int wm831x_post_init(struct wm831x *parm)
+{
+ struct regulator *dcdc;
+ struct regulator *ldo;
+
+ //dcdc init
+ dcdc = regulator_get(NULL, "dcdc1");
+ regulator_set_voltage(dcdc,1800000,1800000);
+ regulator_enable(dcdc);
+ printk("%s set dcdc1=%dmV end\n", __FUNCTION__, regulator_get_voltage(dcdc));
+ regulator_put(dcdc);
+
+ dcdc = regulator_get(NULL, "dcdc2");
+ regulator_set_voltage(dcdc,1300000,1300000);
+ regulator_enable(dcdc);
+ printk("%s set dcdc2=%dmV end\n", __FUNCTION__, regulator_get_voltage(dcdc));
+ regulator_put(dcdc);
+
+ dcdc = regulator_get(NULL, "dcdc3");
+ regulator_set_voltage(dcdc,3000000,3000000);
+ regulator_enable(dcdc);
+ printk("%s set dcdc3=%dmV end\n", __FUNCTION__, regulator_get_voltage(dcdc));
+ regulator_put(dcdc);
+
+ dcdc = regulator_get(NULL, "dcdc4");
+ regulator_set_voltage(dcdc,20000000,20000000);
+ regulator_enable(dcdc);
+ printk("%s set dcdc4=%dmV end\n", __FUNCTION__, regulator_get_voltage(dcdc));
+ regulator_put(dcdc);
+
+ //ldo init
+ ldo = regulator_get(NULL, "ldo1");
+ regulator_set_voltage(ldo,1800000,1800000);
+ regulator_enable(ldo);
+ printk("%s set ldo1=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo2");
+ regulator_set_voltage(ldo,1800000,1800000);
+ regulator_enable(ldo);
+ printk("%s set ldo2=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo3");
+ regulator_set_voltage(ldo,1800000,1800000);
+ regulator_enable(ldo);
+ printk("%s set ldo3=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo4");
+ regulator_set_voltage(ldo,2800000,2800000);
+ //regulator_enable(ldo);
+ //printk("%s set ldo4=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo5");
+ regulator_set_voltage(ldo,2800000,2800000);
+ regulator_enable(ldo);
+ printk("%s set ldo5=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo6");
+ regulator_set_voltage(ldo,3000000,3000000);
+ regulator_enable(ldo);
+ printk("%s set ldo6=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo7");
+ regulator_set_voltage(ldo,3300000,3300000);
+ regulator_enable(ldo);
+ printk("%s set ldo7=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo8");
+ regulator_set_voltage(ldo,1200000,1200000);
+ //regulator_enable(ldo);
+ //printk("%s set ldo8=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo9");
+ regulator_set_voltage(ldo,3000000,3000000);
+ regulator_enable(ldo);
+ printk("%s set ldo9=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo10");
+ regulator_set_voltage(ldo,3000000,3000000);
+ regulator_enable(ldo);
+ printk("%s set ldo10=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo11");
+ //regulator_enable(ldo);
+ printk("%s set ldo11=%dmV end\n", __FUNCTION__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+
+
+ return 0;
+}
+
+extern void wm831x_enter_sleep(void);
+extern void wm831x_exit_sleep(void);
+
+void pmu_wm831x_set_suspend_voltage(void)
+{
+
+}
+EXPORT_SYMBOL_GPL(pmu_wm831x_set_suspend_voltage);
+
+void pmu_wm831x_set_resume_voltage(void)
+{
+
+}
+EXPORT_SYMBOL_GPL(pmu_wm831x_set_resume_voltage);
+
+int wm831x_last_deinit(struct wm831x *parm)
+{
+ printk("%s\n", __FUNCTION__);
+
+ return 0;
+}
+
+struct wm831x_backlight_pdata wm831x_backlight_platdata = {
+ .isink = 1, /** ISINK to use, 1 or 2 */
+ .max_uA = 5000, /** Maximum current to allow */
+};
+
+struct wm831x_backup_pdata wm831x_backup_platdata = {
+ .charger_enable = 1,
+ .no_constant_voltage = 0, /** Disable constant voltage charging */
+ .vlim = 3100, /** Voltage limit in milivolts */
+ .ilim = 300, /** Current limit in microamps */
+};
+
+struct wm831x_battery_pdata wm831x_battery_platdata = {
+ .enable = 1, /** Enable charging */
+ .fast_enable = 1, /** Enable fast charging */
+ .off_mask = 1, /** Mask OFF while charging */
+ .trickle_ilim = 200, /** Trickle charge current limit, in mA */
+ .vsel = 4200, /** Target voltage, in mV */
+ .eoc_iterm = 90, /** End of trickle charge current, in mA */
+ .fast_ilim = 1000, /** Fast charge current limit, in mA */
+ .timeout = 180, /** Charge cycle timeout, in minutes */
+ .syslo = 3300, /* syslo threshold, in mV*/
+ .sysok = 3500, /* sysko threshold, in mV*/
+};
+
+struct wm831x_status_pdata wm831x_status_platdata[WM831X_MAX_STATUS] = {
+ {
+ .default_src = WM831X_STATUS_OTP,
+ .name = "wm831x_status0",
+ .default_trigger = "wm831x_otp",
+ },
+ {
+ .default_src = WM831X_STATUS_POWER,
+ .name = "wm831x_status1",
+ .default_trigger = "wm831x_power",
+ },
+};
+
+
+static struct regulator_consumer_supply dcdc1_consumers[] = {
+ {
+ .supply = "dcdc1",
+ }
+};
+static struct regulator_consumer_supply dcdc2_consumers[] = {
+ {
+ .supply = "dcdc2",
+ }
+};
+static struct regulator_consumer_supply dcdc3_consumers[] = {
+ {
+ .supply = "dcdc3",
+ }
+};
+static struct regulator_consumer_supply dcdc4_consumers[] = {
+ {
+ .supply = "dcdc4",
+ }
+};
+static struct regulator_consumer_supply epe1_consumers[] = {
+ {
+ .supply = "epe1",
+ }
+};
+static struct regulator_consumer_supply epe2_consumers[] = {
+ {
+ .supply = "epe2",
+ }
+};
+static struct regulator_consumer_supply ldo1_consumers[] = {
+ {
+ .supply = "ldo1",
+ }
+};
+static struct regulator_consumer_supply ldo2_consumers[] = {
+ {
+ .supply = "ldo2",
+ }
+};
+static struct regulator_consumer_supply ldo3_consumers[] = {
+ {
+ .supply = "ldo3",
+ }
+};
+static struct regulator_consumer_supply ldo4_consumers[] = {
+ {
+ .supply = "ldo4",
+ }
+};
+static struct regulator_consumer_supply ldo5_consumers[] = {
+ {
+ .supply = "ldo5",
+ }
+};
+static struct regulator_consumer_supply ldo6_consumers[] = {
+ {
+ .supply = "ldo6",
+ }
+};
+static struct regulator_consumer_supply ldo7_consumers[] = {
+ {
+ .supply = "ldo7",
+ }
+};
+static struct regulator_consumer_supply ldo8_consumers[] = {
+ {
+ .supply = "ldo8",
+ }
+};
+static struct regulator_consumer_supply ldo9_consumers[] = {
+ {
+ .supply = "ldo9",
+ }
+};
+static struct regulator_consumer_supply ldo10_consumers[] = {
+ {
+ .supply = "ldo10",
+ }
+};
+static struct regulator_consumer_supply ldo11_consumers[] = {
+ {
+ .supply = "ldo11",
+ }
+};
+static struct regulator_consumer_supply isink1_consumers[] = {
+ {
+ .supply = "isink1",
+ }
+};
+static struct regulator_consumer_supply isink2_consumers[] = {
+ {
+ .supply = "isink2",
+ }
+};
+
+struct regulator_init_data wm831x_regulator_init_dcdc[WM831X_MAX_DCDC] = {
+ {
+ .constraints = {
+ .name = "DCDC1",
+ .min_uV = 600000,
+ .max_uV = 1800000,//0.6-1.8V
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(dcdc1_consumers),
+ .consumer_supplies = dcdc1_consumers,
+ },
+ {
+ .constraints = {
+ .name = "DCDC2",
+ .min_uV = 600000,
+ .max_uV = 1800000,//0.6-1.8V
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(dcdc2_consumers),
+ .consumer_supplies = dcdc2_consumers,
+ },
+ {
+ .constraints = {
+ .name = "DCDC3",
+ .min_uV = 850000,
+ .max_uV = 3400000,//0.85-3.4V
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(dcdc3_consumers),
+ .consumer_supplies = dcdc3_consumers,
+ },
+ {
+ .constraints = {
+ .name = "DCDC4",
+ .min_uV = 00000000,
+ .max_uV = 30000000,//30V/40mA
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(dcdc4_consumers),
+ .consumer_supplies = dcdc4_consumers,
+ },
+
+};
+struct regulator_init_data wm831x_regulator_init_epe[WM831X_MAX_EPE] = {
+ {
+ .constraints = {
+ .name = "EPE1",
+ .min_uV = 1200000,
+ .max_uV = 3000000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(epe1_consumers),
+ .consumer_supplies = epe1_consumers,
+ },
+ {
+ .constraints = {
+ .name = "EPE2",
+ .min_uV = 1200000,
+ .max_uV = 3000000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(epe2_consumers),
+ .consumer_supplies = epe2_consumers,
+ },
+};
+
+struct regulator_init_data wm831x_regulator_init_ldo[WM831X_MAX_LDO] = {
+ {
+ .constraints = {
+ .name = "LDO1",
+ .min_uV = 900000,
+ .max_uV = 3300000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo1_consumers),
+ .consumer_supplies = ldo1_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO2",
+ .min_uV = 900000,
+ .max_uV = 3300000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo2_consumers),
+ .consumer_supplies = ldo2_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO3",
+ .min_uV = 900000,
+ .max_uV = 3300000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo3_consumers),
+ .consumer_supplies = ldo3_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO4",
+ .min_uV = 900000,
+ .max_uV = 3300000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo4_consumers),
+ .consumer_supplies = ldo4_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO5",
+ .min_uV = 900000,
+ .max_uV = 3300000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo5_consumers),
+ .consumer_supplies = ldo5_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO6",
+ .min_uV = 900000,
+ .max_uV = 3300000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo6_consumers),
+ .consumer_supplies = ldo6_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO7",
+ .min_uV = 1000000,
+ .max_uV = 3500000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo7_consumers),
+ .consumer_supplies = ldo7_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO8",
+ .min_uV = 1000000,
+ .max_uV = 3500000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo8_consumers),
+ .consumer_supplies = ldo8_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO9",
+ .min_uV = 1000000,
+ .max_uV = 3500000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo9_consumers),
+ .consumer_supplies = ldo9_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO10",
+ .min_uV = 1000000,
+ .max_uV = 3500000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo10_consumers),
+ .consumer_supplies = ldo10_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO11",
+ .min_uV = 1200000,
+ .max_uV = 3000000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo11_consumers),
+ .consumer_supplies = ldo11_consumers,
+ },
+};
+
+struct regulator_init_data wm831x_regulator_init_isink[WM831X_MAX_ISINK] = {
+ {
+ .constraints = {
+ .name = "ISINK1",
+ .min_uA = 00000,
+ .max_uA = 40000,
+ .always_on = true,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_CURRENT,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(isink1_consumers),
+ .consumer_supplies = isink1_consumers,
+ },
+ {
+ .constraints = {
+ .name = "ISINK2",
+ .min_uA = 0000000,
+ .max_uA = 0000000,
+ .apply_uV = false,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_CURRENT,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(isink2_consumers),
+ .consumer_supplies = isink2_consumers,
+ },
+};
+
+static int wm831x_checkrange(int start,int num,int val)
+{
+ if((val<(start+num))&&(val>=start))
+ return 0;
+ else
+ return -1;
+}
+
+static int wm831x_init_pin_type(struct wm831x *wm831x)
+{
+#if 0
+ struct wm831x_pdata *pdata = wm831x->dev->platform_data;
+ struct rk2818_gpio_expander_info *wm831x_gpio_settinginfo;
+ uint16_t offset = 0;
+ uint16_t wm831x_settingpin_num = 0;
+ uint16_t ret = 0;
+ int i = 0;
+
+ if(wm831x)
+ {
+ wm831x_gpio_settinginfo=pdata->settinginfo;
+ if(wm831x_gpio_settinginfo)
+ {
+ wm831x_settingpin_num = pdata->settinginfolen;
+ for(i=0;i<wm831x_settingpin_num;i++)
+ {
+ if(!wm831x_checkrange(pdata->gpio_base,pdata->gpio_pin_num,wm831x_gpio_settinginfo[i].gpio_num))
+ {
+ offset = wm831x_gpio_settinginfo[i].gpio_num - pdata->gpio_base;
+
+ if(wm831x_gpio_settinginfo[i].pin_type==GPIO_IN)
+ {
+ wm831x_set_bits(wm831x,(WM831X_GPIO1_CONTROL+offset), WM831X_GPN_DIR_MASK|WM831X_GPN_TRI_MASK, 1<<WM831X_GPN_DIR_SHIFT|1<<WM831X_GPN_TRI_SHIFT);
+ }
+ else
+ {
+ wm831x_set_bits(wm831x,(WM831X_GPIO1_CONTROL+offset), WM831X_GPN_DIR_MASK|WM831X_GPN_TRI_MASK, 1<<WM831X_GPN_TRI_SHIFT);
+ if(wm831x_gpio_settinginfo[i].pin_value==GPIO_HIGH)
+ {
+ wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, (1 << offset),(1 << offset));
+ }
+ else
+ {
+ wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, (1 << offset),(0 << offset));
+ }
+ }
+
+ }
+ }
+ }
+ }
+
+ for(i=0;i<pdata->gpio_pin_num;i++)
+ {
+ wm831x_set_bits(wm831x,(WM831X_GPIO1_CONTROL+i),
+ WM831X_GPN_PULL_MASK|WM831X_GPN_POL_MASK|WM831X_GPN_OD_MASK|WM831X_GPN_TRI_MASK,
+ 1<<WM831X_GPN_POL_SHIFT|1<<WM831X_GPN_TRI_SHIFT);
+ ret = wm831x_reg_read(wm831x, WM831X_GPIO1_CONTROL+i);
+ printk("Gpio%d Pin Configuration = %x\n",i,ret);
+ }
+#endif
+ return 0;
+}
+
+/*
+ * GPIO Buttons
+ */
+#if defined(CONFIG_KEYBOARD_WM831X_GPIO)
+static struct wm831x_gpio_keys_button wm831x_gpio_buttons[] = {
+{
+ .code = KEY_MEDIA,
+ .gpio = TCA6424_P21,
+ .active_low = 1,
+ .desc = "media",
+ .wakeup = 0,
+ .debounce_interval = 120,
+},
+{
+ .code= KEY_VOLUMEUP,
+ .gpio= WM831X_P05,
+ .active_low= 1,
+ .desc= "volume_up",
+ .wakeup= 0,
+},
+{
+ .code= KEY_CAMERA,
+ .gpio= WM831X_P06,
+ .active_low= 1,
+ .desc= "camera",
+ .wakeup= 0,
+},
+{
+ .code= KEY_VOLUMEDOWN,
+ .gpio= WM831X_P07,
+ .active_low= 1,
+ .desc= "volume_down",
+ .wakeup= 0,
+},
+{
+ .code= KEY_END,
+ .gpio= WM831X_P09,
+ .active_low= 1,
+ .desc= "enter",
+ .wakeup= 0,
+},
+{
+ .code= KEY_MENU,
+ .gpio= WM831X_P10,
+ .active_low= 1,
+ .desc= "menu",
+ .wakeup= 0,
+},
+{
+ .code= KEY_SEND,
+ .gpio= WM831X_P11,
+ .active_low= 1,
+ .desc= "esc",
+ .wakeup= 0,
+},
+{
+ .code= KEY_BACK,
+ .gpio= WM831X_P12,
+ .active_low= 1,
+ .desc= "home",
+ .wakeup= 0,
+},
+};
+
+struct wm831x_gpio_keys_pdata wm831x_gpio_keys_platdata = {
+ .buttons = wm831x_gpio_buttons,
+ .nbuttons = ARRAY_SIZE(wm831x_gpio_buttons),
+};
+
+#endif
+struct wm831x_pdata wm831x_platdata = {
+ /** Called before subdevices are set up */
+ .pre_init= wm831x_pre_init,
+ /** Called after subdevices are set up */
+ .post_init = wm831x_post_init,
+ /** Called before subdevices are power down */
+ .last_deinit = wm831x_last_deinit,
+
+#if defined(CONFIG_GPIO_WM831X)
+ .gpio_base=WM831X_GPIO_EXPANDER_BASE,
+ .gpio_pin_num=WM831X_TOTOL_GPIO_NUM,
+ .settinginfo=wm831x_gpio_settinginfo,
+ .settinginfolen=ARRAY_SIZE(wm831x_gpio_settinginfo),
+ .pin_type_init = wm831x_init_pin_type,
+ .irq_base= NR_AIC_IRQS + 2*NUM_GROUP + TCA6424_TOTOL_GPIO_IRQ_NUM + CONFIG_SPI_FPGA_GPIO_IRQ_NUM,
+#endif
+
+ .backlight = &wm831x_backlight_platdata,
+
+ .backup = &wm831x_backup_platdata,
+
+ .battery = &wm831x_battery_platdata,
+ //.wm831x_touch_pdata = NULL,
+ //.watchdog = NULL,
+
+#if defined(CONFIG_KEYBOARD_WM831X_GPIO)
+ .gpio_keys = &wm831x_gpio_keys_platdata,
+#endif
+
+ /** LED1 = 0 and so on */
+ .status = {&wm831x_status_platdata[0], &wm831x_status_platdata[1]},
+
+ /** DCDC1 = 0 and so on */
+ .dcdc = {&wm831x_regulator_init_dcdc[0], &wm831x_regulator_init_dcdc[1], &wm831x_regulator_init_dcdc[2], &wm831x_regulator_init_dcdc[3]},
+
+ /** EPE1 = 0 and so on */
+ .epe = {&wm831x_regulator_init_epe[0], &wm831x_regulator_init_epe[1]},
+
+ /** LDO1 = 0 and so on */
+ .ldo = {&wm831x_regulator_init_ldo[0], &wm831x_regulator_init_ldo[1], &wm831x_regulator_init_ldo[2], &wm831x_regulator_init_ldo[3],
+ &wm831x_regulator_init_ldo[4], &wm831x_regulator_init_ldo[5], &wm831x_regulator_init_ldo[6], &wm831x_regulator_init_ldo[7],
+ &wm831x_regulator_init_ldo[8], &wm831x_regulator_init_ldo[9], &wm831x_regulator_init_ldo[10]},
+
+ /** ISINK1 = 0 and so on*/
+ .isink = {&wm831x_regulator_init_isink[0], &wm831x_regulator_init_isink[1]},
+};
+#endif
+
+
#if defined(CONFIG_RK29_GPS)
#define PIN_BASE 0
#define MAX_BANK 7
+#define RK29_TOTOL_GPIO_NUM (NUM_GROUP*MAX_BANK)
+
+#define SPI_FPGA_EXPANDER_BASE (PIN_BASE+RK29_TOTOL_GPIO_NUM)
+
+#if defined (CONFIG_SPI_FPGA_GPIO)
+#define GPIO_EXPANDER_BASE (PIN_BASE+RK29_TOTOL_GPIO_NUM+CONFIG_SPI_FPGA_GPIO_NUM)
+#else
+#define GPIO_EXPANDER_BASE (PIN_BASE+RK29_TOTOL_GPIO_NUM)
+#endif
+
+#if defined(CONFIG_IOEXTEND_TCA6424)
+#define TCA6424_TOTOL_GPIO_NUM 24
+#define TCA6424_TOTOL_GPIO_IRQ_NUM 24
+#define TCA6424_GPIO_EXPANDER_BASE GPIO_EXPANDER_BASE
+#else
+#define TCA6424_TOTOL_GPIO_NUM 0
+#define TCA6424_TOTOL_GPIO_IRQ_NUM 0
+#endif
+
+#if defined(CONFIG_GPIO_WM831X)
+#define WM831X_TOTOL_GPIO_NUM 12
+#define WM831X_GPIO_EXPANDER_BASE (GPIO_EXPANDER_BASE+TCA6424_TOTOL_GPIO_NUM)
+#else
+#define WM831X_TOTOL_GPIO_NUM 0
+#define WM831X_GPIO_EXPANDER_BASE (GPIO_EXPANDER_BASE+TCA6424_TOTOL_GPIO_NUM)
+#endif
+//¶¨ÒåGPIOµÄPIN¿Ú×î´óÊýÄ¿¡£CONFIG_SPI_FPGA_GPIO_NUM±íʾFPGAµÄPIN½ÅÊý¡£
+#define ARCH_NR_GPIOS (RK29_TOTOL_GPIO_NUM + TCA6424_TOTOL_GPIO_NUM + WM831X_TOTOL_GPIO_NUM + CONFIG_SPI_FPGA_GPIO_NUM)
+
+
#define RK29_PIN0_PA0 (0*NUM_GROUP + PIN_BASE + 0)
#define RK29_PIN0_PA1 (0*NUM_GROUP + PIN_BASE + 1)
#define RK29_PIN0_PA2 (0*NUM_GROUP + PIN_BASE + 2)
#define RK29_PIN6_PD5 (6*NUM_GROUP + PIN_BASE + 29)
#define RK29_PIN6_PD6 (6*NUM_GROUP + PIN_BASE + 30)
#define RK29_PIN6_PD7 (6*NUM_GROUP + PIN_BASE + 31)
-
-#define ARCH_NR_GPIOS (NUM_GROUP*MAX_BANK)
+
+#if defined(CONFIG_SPI_FPGA_GPIO)
+#define FPGA_PIO0_00 (SPI_FPGA_EXPANDER_BASE + 0*NUM_GROUP + 0)
+#define FPGA_PIO0_01 (SPI_FPGA_EXPANDER_BASE + 0*NUM_GROUP + 1)
+#define FPGA_PIO0_02 (SPI_FPGA_EXPANDER_BASE + 0*NUM_GROUP + 2)
+#define FPGA_PIO0_03 (SPI_FPGA_EXPANDER_BASE + 0*NUM_GROUP + 3)
+#define FPGA_PIO0_04 (SPI_FPGA_EXPANDER_BASE + 0*NUM_GROUP + 4)
+#define FPGA_PIO0_05 (SPI_FPGA_EXPANDER_BASE + 0*NUM_GROUP + 5)
+#define FPGA_PIO0_06 (SPI_FPGA_EXPANDER_BASE + 0*NUM_GROUP + 6)
+#define FPGA_PIO0_07 (SPI_FPGA_EXPANDER_BASE + 0*NUM_GROUP + 7)
+
+#define FPGA_PIO0_08 (SPI_FPGA_EXPANDER_BASE + 1*NUM_GROUP + 0)
+#define FPGA_PIO0_09 (SPI_FPGA_EXPANDER_BASE + 1*NUM_GROUP + 1)
+#define FPGA_PIO0_10 (SPI_FPGA_EXPANDER_BASE + 1*NUM_GROUP + 2)
+#define FPGA_PIO0_11 (SPI_FPGA_EXPANDER_BASE + 1*NUM_GROUP + 3)
+#define FPGA_PIO0_12 (SPI_FPGA_EXPANDER_BASE + 1*NUM_GROUP + 4)
+#define FPGA_PIO0_13 (SPI_FPGA_EXPANDER_BASE + 1*NUM_GROUP + 5)
+#define FPGA_PIO0_14 (SPI_FPGA_EXPANDER_BASE + 1*NUM_GROUP + 6)
+#define FPGA_PIO0_15 (SPI_FPGA_EXPANDER_BASE + 1*NUM_GROUP + 7)
+
+#define FPGA_PIO1_00 (SPI_FPGA_EXPANDER_BASE + 2*NUM_GROUP + 0)
+#define FPGA_PIO1_01 (SPI_FPGA_EXPANDER_BASE + 2*NUM_GROUP + 1)
+#define FPGA_PIO1_02 (SPI_FPGA_EXPANDER_BASE + 2*NUM_GROUP + 2)
+#define FPGA_PIO1_03 (SPI_FPGA_EXPANDER_BASE + 2*NUM_GROUP + 3)
+#define FPGA_PIO1_04 (SPI_FPGA_EXPANDER_BASE + 2*NUM_GROUP + 4)
+#define FPGA_PIO1_05 (SPI_FPGA_EXPANDER_BASE + 2*NUM_GROUP + 5)
+#define FPGA_PIO1_06 (SPI_FPGA_EXPANDER_BASE + 2*NUM_GROUP + 6)
+#define FPGA_PIO1_07 (SPI_FPGA_EXPANDER_BASE + 2*NUM_GROUP + 7)
+
+#define FPGA_PIO1_08 (SPI_FPGA_EXPANDER_BASE + 3*NUM_GROUP + 0)
+#define FPGA_PIO1_09 (SPI_FPGA_EXPANDER_BASE + 3*NUM_GROUP + 1)
+#define FPGA_PIO1_10 (SPI_FPGA_EXPANDER_BASE + 3*NUM_GROUP + 2)
+#define FPGA_PIO1_11 (SPI_FPGA_EXPANDER_BASE + 3*NUM_GROUP + 3)
+#define FPGA_PIO1_12 (SPI_FPGA_EXPANDER_BASE + 3*NUM_GROUP + 4)
+#define FPGA_PIO1_13 (SPI_FPGA_EXPANDER_BASE + 3*NUM_GROUP + 5)
+#define FPGA_PIO1_14 (SPI_FPGA_EXPANDER_BASE + 3*NUM_GROUP + 6)
+#define FPGA_PIO1_15 (SPI_FPGA_EXPANDER_BASE + 3*NUM_GROUP + 7)
+
+#define FPGA_PIO2_00 (SPI_FPGA_EXPANDER_BASE + 4*NUM_GROUP + 0)
+#define FPGA_PIO2_01 (SPI_FPGA_EXPANDER_BASE + 4*NUM_GROUP + 1)
+#define FPGA_PIO2_02 (SPI_FPGA_EXPANDER_BASE + 4*NUM_GROUP + 2)
+#define FPGA_PIO2_03 (SPI_FPGA_EXPANDER_BASE + 4*NUM_GROUP + 3)
+#define FPGA_PIO2_04 (SPI_FPGA_EXPANDER_BASE + 4*NUM_GROUP + 4)
+#define FPGA_PIO2_05 (SPI_FPGA_EXPANDER_BASE + 4*NUM_GROUP + 5)
+#define FPGA_PIO2_06 (SPI_FPGA_EXPANDER_BASE + 4*NUM_GROUP + 6)
+#define FPGA_PIO2_07 (SPI_FPGA_EXPANDER_BASE + 4*NUM_GROUP + 7)
+
+#define FPGA_PIO2_08 (SPI_FPGA_EXPANDER_BASE + 5*NUM_GROUP + 0)
+#define FPGA_PIO2_09 (SPI_FPGA_EXPANDER_BASE + 5*NUM_GROUP + 1)
+#define FPGA_PIO2_10 (SPI_FPGA_EXPANDER_BASE + 5*NUM_GROUP + 2)
+#define FPGA_PIO2_11 (SPI_FPGA_EXPANDER_BASE + 5*NUM_GROUP + 3)
+#define FPGA_PIO2_12 (SPI_FPGA_EXPANDER_BASE + 5*NUM_GROUP + 4)
+#define FPGA_PIO2_13 (SPI_FPGA_EXPANDER_BASE + 5*NUM_GROUP + 5)
+#define FPGA_PIO2_14 (SPI_FPGA_EXPANDER_BASE + 5*NUM_GROUP + 6)
+#define FPGA_PIO2_15 (SPI_FPGA_EXPANDER_BASE + 5*NUM_GROUP + 7)
+
+#define FPGA_PIO3_00 (SPI_FPGA_EXPANDER_BASE + 6*NUM_GROUP + 0)
+#define FPGA_PIO3_01 (SPI_FPGA_EXPANDER_BASE + 6*NUM_GROUP + 1)
+#define FPGA_PIO3_02 (SPI_FPGA_EXPANDER_BASE + 6*NUM_GROUP + 2)
+#define FPGA_PIO3_03 (SPI_FPGA_EXPANDER_BASE + 6*NUM_GROUP + 3)
+#define FPGA_PIO3_04 (SPI_FPGA_EXPANDER_BASE + 6*NUM_GROUP + 4)
+#define FPGA_PIO3_05 (SPI_FPGA_EXPANDER_BASE + 6*NUM_GROUP + 5)
+#define FPGA_PIO3_06 (SPI_FPGA_EXPANDER_BASE + 6*NUM_GROUP + 6)
+#define FPGA_PIO3_07 (SPI_FPGA_EXPANDER_BASE + 6*NUM_GROUP + 7)
+
+#define FPGA_PIO3_08 (SPI_FPGA_EXPANDER_BASE + 7*NUM_GROUP + 0)
+#define FPGA_PIO3_09 (SPI_FPGA_EXPANDER_BASE + 7*NUM_GROUP + 1)
+#define FPGA_PIO3_10 (SPI_FPGA_EXPANDER_BASE + 7*NUM_GROUP + 2)
+#define FPGA_PIO3_11 (SPI_FPGA_EXPANDER_BASE + 7*NUM_GROUP + 3)
+#define FPGA_PIO3_12 (SPI_FPGA_EXPANDER_BASE + 7*NUM_GROUP + 4)
+#define FPGA_PIO3_13 (SPI_FPGA_EXPANDER_BASE + 7*NUM_GROUP + 5)
+#define FPGA_PIO3_14 (SPI_FPGA_EXPANDER_BASE + 7*NUM_GROUP + 6)
+#define FPGA_PIO3_15 (SPI_FPGA_EXPANDER_BASE + 7*NUM_GROUP + 7)
+
+#define FPGA_PIO4_00 (SPI_FPGA_EXPANDER_BASE + 8*NUM_GROUP + 0)
+#define FPGA_PIO4_01 (SPI_FPGA_EXPANDER_BASE + 8*NUM_GROUP + 1)
+#define FPGA_PIO4_02 (SPI_FPGA_EXPANDER_BASE + 8*NUM_GROUP + 2)
+#define FPGA_PIO4_03 (SPI_FPGA_EXPANDER_BASE + 8*NUM_GROUP + 3)
+#define FPGA_PIO4_04 (SPI_FPGA_EXPANDER_BASE + 8*NUM_GROUP + 4)
+#define FPGA_PIO4_05 (SPI_FPGA_EXPANDER_BASE + 8*NUM_GROUP + 5)
+#define FPGA_PIO4_06 (SPI_FPGA_EXPANDER_BASE + 8*NUM_GROUP + 6)
+#define FPGA_PIO4_07 (SPI_FPGA_EXPANDER_BASE + 8*NUM_GROUP + 7)
+
+#define FPGA_PIO4_08 (SPI_FPGA_EXPANDER_BASE + 9*NUM_GROUP + 0)
+#define FPGA_PIO4_09 (SPI_FPGA_EXPANDER_BASE + 9*NUM_GROUP + 1)
+#define FPGA_PIO4_10 (SPI_FPGA_EXPANDER_BASE + 9*NUM_GROUP + 2)
+#define FPGA_PIO4_11 (SPI_FPGA_EXPANDER_BASE + 9*NUM_GROUP + 3)
+#define FPGA_PIO4_12 (SPI_FPGA_EXPANDER_BASE + 9*NUM_GROUP + 4)
+#define FPGA_PIO4_13 (SPI_FPGA_EXPANDER_BASE + 9*NUM_GROUP + 5)
+#define FPGA_PIO4_14 (SPI_FPGA_EXPANDER_BASE + 9*NUM_GROUP + 6)
+#define FPGA_PIO4_15 (SPI_FPGA_EXPANDER_BASE + 9*NUM_GROUP + 7)
+
+#define FPGA_PIO5_00 (SPI_FPGA_EXPANDER_BASE + 10*NUM_GROUP + 0)
+#define FPGA_PIO5_01 (SPI_FPGA_EXPANDER_BASE + 10*NUM_GROUP + 1)
+#define FPGA_PIO5_02 (SPI_FPGA_EXPANDER_BASE + 10*NUM_GROUP + 2)
+#define FPGA_PIO5_03 (SPI_FPGA_EXPANDER_BASE + 10*NUM_GROUP + 3)
+#define FPGA_PIO5_04 (SPI_FPGA_EXPANDER_BASE + 10*NUM_GROUP + 4)
+#define FPGA_PIO5_05 (SPI_FPGA_EXPANDER_BASE + 10*NUM_GROUP + 5)
+#define FPGA_PIO5_06 (SPI_FPGA_EXPANDER_BASE + 10*NUM_GROUP + 6)
+#define FPGA_PIO5_07 (SPI_FPGA_EXPANDER_BASE + 10*NUM_GROUP + 7)
+
+#define FPGA_PIO5_08 (SPI_FPGA_EXPANDER_BASE + 11*NUM_GROUP + 0)
+#define FPGA_PIO5_09 (SPI_FPGA_EXPANDER_BASE + 11*NUM_GROUP + 1)
+#define FPGA_PIO5_10 (SPI_FPGA_EXPANDER_BASE + 11*NUM_GROUP + 2)
+#define FPGA_PIO5_11 (SPI_FPGA_EXPANDER_BASE + 11*NUM_GROUP + 3)
+#define FPGA_PIO5_12 (SPI_FPGA_EXPANDER_BASE + 11*NUM_GROUP + 4)
+#define FPGA_PIO5_13 (SPI_FPGA_EXPANDER_BASE + 11*NUM_GROUP + 5)
+#define FPGA_PIO5_14 (SPI_FPGA_EXPANDER_BASE + 11*NUM_GROUP + 6)
+#define FPGA_PIO5_15 (SPI_FPGA_EXPANDER_BASE + 11*NUM_GROUP + 7)
+
+#endif
+
+#if defined(CONFIG_IOEXTEND_TCA6424)
+#define TCA6424_P00 (TCA6424_GPIO_EXPANDER_BASE + 0*NUM_GROUP + 0)
+#define TCA6424_P01 (TCA6424_GPIO_EXPANDER_BASE + 0*NUM_GROUP + 1)
+#define TCA6424_P02 (TCA6424_GPIO_EXPANDER_BASE + 0*NUM_GROUP + 2)
+#define TCA6424_P03 (TCA6424_GPIO_EXPANDER_BASE + 0*NUM_GROUP + 3)
+#define TCA6424_P04 (TCA6424_GPIO_EXPANDER_BASE + 0*NUM_GROUP + 4)
+#define TCA6424_P05 (TCA6424_GPIO_EXPANDER_BASE + 0*NUM_GROUP + 5)
+#define TCA6424_P06 (TCA6424_GPIO_EXPANDER_BASE + 0*NUM_GROUP + 6)
+#define TCA6424_P07 (TCA6424_GPIO_EXPANDER_BASE + 0*NUM_GROUP + 7)
+
+#define TCA6424_P10 (TCA6424_GPIO_EXPANDER_BASE + 1*NUM_GROUP + 0)
+#define TCA6424_P11 (TCA6424_GPIO_EXPANDER_BASE + 1*NUM_GROUP + 1)
+#define TCA6424_P12 (TCA6424_GPIO_EXPANDER_BASE + 1*NUM_GROUP + 2)
+#define TCA6424_P13 (TCA6424_GPIO_EXPANDER_BASE + 1*NUM_GROUP + 3)
+#define TCA6424_P14 (TCA6424_GPIO_EXPANDER_BASE + 1*NUM_GROUP + 4)
+#define TCA6424_P15 (TCA6424_GPIO_EXPANDER_BASE + 1*NUM_GROUP + 5)
+#define TCA6424_P16 (TCA6424_GPIO_EXPANDER_BASE + 1*NUM_GROUP + 6)
+#define TCA6424_P17 (TCA6424_GPIO_EXPANDER_BASE + 1*NUM_GROUP + 7)
+
+#define TCA6424_P20 (TCA6424_GPIO_EXPANDER_BASE + 2*NUM_GROUP + 0)
+#define TCA6424_P21 (TCA6424_GPIO_EXPANDER_BASE + 2*NUM_GROUP + 1)
+#define TCA6424_P22 (TCA6424_GPIO_EXPANDER_BASE + 2*NUM_GROUP + 2)
+#define TCA6424_P23 (TCA6424_GPIO_EXPANDER_BASE + 2*NUM_GROUP + 3)
+#define TCA6424_P24 (TCA6424_GPIO_EXPANDER_BASE + 2*NUM_GROUP + 4)
+#define TCA6424_P25 (TCA6424_GPIO_EXPANDER_BASE + 2*NUM_GROUP + 5)
+#define TCA6424_P26 (TCA6424_GPIO_EXPANDER_BASE + 2*NUM_GROUP + 6)
+#define TCA6424_P27 (TCA6424_GPIO_EXPANDER_BASE + 2*NUM_GROUP + 7)
+#endif
+
+#if defined(CONFIG_GPIO_WM831X)
+#define WM831X_P01 (WM831X_GPIO_EXPANDER_BASE + 0*NUM_GROUP + 0)
+#define WM831X_P02 (WM831X_GPIO_EXPANDER_BASE + 0*NUM_GROUP + 1)
+#define WM831X_P03 (WM831X_GPIO_EXPANDER_BASE + 0*NUM_GROUP + 2)
+#define WM831X_P04 (WM831X_GPIO_EXPANDER_BASE + 0*NUM_GROUP + 3)
+#define WM831X_P05 (WM831X_GPIO_EXPANDER_BASE + 0*NUM_GROUP + 4)
+#define WM831X_P06 (WM831X_GPIO_EXPANDER_BASE + 0*NUM_GROUP + 5)
+#define WM831X_P07 (WM831X_GPIO_EXPANDER_BASE + 0*NUM_GROUP + 6)
+#define WM831X_P08 (WM831X_GPIO_EXPANDER_BASE + 0*NUM_GROUP + 7)
+
+#define WM831X_P09 (WM831X_GPIO_EXPANDER_BASE + 1*NUM_GROUP + 0)
+#define WM831X_P10 (WM831X_GPIO_EXPANDER_BASE + 1*NUM_GROUP + 1)
+#define WM831X_P11 (WM831X_GPIO_EXPANDER_BASE + 1*NUM_GROUP + 2)
+#define WM831X_P12 (WM831X_GPIO_EXPANDER_BASE + 1*NUM_GROUP + 3)
+#endif
#ifndef __ASSEMBLY__
extern void __init rk29_gpio_init(void);
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