Correctly constrain a register class when computing frame offsets, as the Thumb2
authorCameron Zwarich <zwarich@apple.com>
Thu, 19 May 2011 02:18:27 +0000 (02:18 +0000)
committerCameron Zwarich <zwarich@apple.com>
Thu, 19 May 2011 02:18:27 +0000 (02:18 +0000)
add instruction takes an rGPR. This fixes the last of PR8825.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131619 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMBaseRegisterInfo.cpp

index ea1f08a7da8d4889553af53808585a3d90f9a3a3..9a18a961aaa638e62083e9d7c7ac9f4462bd684c 100644 (file)
@@ -1111,6 +1111,10 @@ materializeFrameBaseRegister(MachineBasicBlock *MBB,
   if (Ins != MBB->end())
     DL = Ins->getDebugLoc();
 
+  const TargetInstrDesc &TID = TII.get(ADDriOpc);
+  MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo();
+  MRI.constrainRegClass(BaseReg, TID.OpInfo[0].getRegClass(this));
+
   MachineInstrBuilder MIB =
     BuildMI(*MBB, Ins, DL, TII.get(ADDriOpc), BaseReg)
     .addFrameIndex(FrameIdx).addImm(Offset);