Update comments. These are for assembler, too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135107 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 452f9081e72a7e9e5ed7cc57829550b1bb3ffcc3..29ab4eaef020af39085fb06222ee86fc250a560e 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -3305,15 +3305,14 @@ def DMB : AInoP<(outs), (ins memb_opt:$opt), MiscFrm, NoItinerary,
 }
 
 def DSB : AInoP<(outs), (ins memb_opt:$opt), MiscFrm, NoItinerary,
-                "dsb", "\t$opt",
-                [/* For disassembly only; pattern left blank */]>,
+                "dsb", "\t$opt", []>,
                 Requires<[IsARM, HasDB]> {
   bits<4> opt;
   let Inst{31-4} = 0xf57ff04;
   let Inst{3-0} = opt;
 }
 
-// ISB has only full system option -- for disassembly only
+// ISB has only full system option
 def ISB : AInoP<(outs), (ins), MiscFrm, NoItinerary, "isb", "", []>,
                 Requires<[IsARM, HasDB]> {
   let Inst{31-4} = 0xf57ff06;