Require that targets specify a namespace for their register classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22921 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index 0e150148d8aff4b8dca66b9373350a565bde7d61..65422996f7bc7fd662d17cdb27a27e62374f8ed8 100644 (file)
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -79,7 +79,10 @@ class RegisterGroup<string n, list<Register> aliases> : Register<n> {
 // register classes.  This also defines the default allocation order of
 // registers by register allocators.
 //
-class RegisterClass<ValueType regType, int alignment, list<Register> regList> {
+class RegisterClass<string namespace, ValueType regType, int alignment,
+                    list<Register> regList> {
+  string Namespace = namespace;
+
   // RegType - Specify the ValueType of the registers in this register class.
   // Note that all registers in a register class must have the same ValueType.
   //