rt3261/rt3224 : optimization bt voip
author邱建斌 <qjb@rock-chips.com>
Fri, 6 Sep 2013 09:00:16 +0000 (17:00 +0800)
committer邱建斌 <qjb@rock-chips.com>
Fri, 6 Sep 2013 09:01:59 +0000 (17:01 +0800)
sound/soc/codecs/rt3261.c
sound/soc/rk29/rk29_rt3261.c

index e2e2402c28a6cc5b397a2bfe2c2171cdb907e747..71aae73386a8c32543e52ca511b130c557566fde 100755 (executable)
@@ -100,9 +100,8 @@ static struct rt3261_init_reg init_list[] = {
        {RT3261_OUTPUT          , 0x8888},//unmute OUTVOLL/R
        {RT3261_SPO_CLSD_RATIO  , 0x0001},
        {RT3261_I2S1_SDP        , 0xd000},
-       
        // huangcun 20130816 s
-       #if 1
+#if 1
        /*speaker*/
        {RT3261_DSP_PATH2       , 0x0000},
        {RT3261_PRIV_INDEX      , 0x003f},//PR3d[14] = 0'b; 
@@ -115,17 +114,28 @@ static struct rt3261_init_reg init_list[] = {
        /*headphone*/
        {RT3261_OUT_L3_MIXER, 0x01fd},
        {RT3261_OUT_R3_MIXER, 0x01fd},
-       {RT3261_HPO_MIXER,    0xc000},
-       #endif
-       #if 1
+       {RT3261_HPO_MIXER,        0xc000},
+#endif
+#if 1
        /*capture*/
-       {RT3261_IN1_IN2,          0x2080},//boost1 = 24db
+       {RT3261_IN1_IN2,          0x2080},//boost1 = 24db
        {RT3261_REC_R2_MIXER, 0x007d},
        {RT3261_MONO_ADC_MIXER,0x7030},
-       //{RT3261_GEN_CTRL1     , 0x2701},//¿ªÆô¼Òô½µÔ룬regfa[13]=0
+       //{RT3261_GEN_CTRL1 , 0x2701},//regfa[13]=0
        {RT3261_DSP_PATH2       , 0x0400},
        {RT3261_DIG_INF_DATA, 0x0300},//right copy to left
-       #endif
+#endif
+#if 0
+       /*lin out*/
+       {RT3261_DSP_PATH2       , 0x0000},
+       {RT3261_PRIV_INDEX      , 0x003f},//PR3d[14] = 0'b; 
+       {RT3261_PRIV_DATA       , 0x0000},
+       {RT3261_DAC2_CTRL       , 0x0000},
+       {RT3261_MONO_DAC_MIXER, 0x4444},
+       {RT3261_OUT_L3_MIXER, 0x01fd},
+       {RT3261_OUT_R3_MIXER, 0x01fd},
+       {RT3261_LOUT_MIXER,   0xc000},
+#endif
        // huangcun 20130816 e
 };
 #define RT3261_INIT_REG_LEN ARRAY_SIZE(init_list)
@@ -765,14 +775,28 @@ static int rt3261_asrc_put(struct snd_kcontrol *kcontrol,
                printk("%s disable\n", __FUNCTION__);
                snd_soc_write(codec, RT3261_ASRC_1, 0x0);                       
                snd_soc_write(codec, RT3261_ASRC_2, 0x0);
+               snd_soc_update_bits(codec, RT3261_GEN_CTRL1, 0x70, 0x0); //bard 8-29
+               mutex_lock(&codec->mutex);
+               snd_soc_dapm_disable_pin(&codec->dapm, "DAC L2 Power"); //bard 9-4
+               snd_soc_dapm_disable_pin(&codec->dapm, "stereo filter"); //bard 9-4
+               snd_soc_dapm_sync(&codec->dapm); //bard 9-4
+               mutex_unlock(&codec->mutex);
                break;
 
        case RT3261_ASRC_EN://enable ASRC
                printk("%s enable\n", __FUNCTION__);
                snd_soc_write(codec, RT3261_ASRC_1, 0x9800);                    
                snd_soc_write(codec, RT3261_ASRC_2, 0xF800);
-               snd_soc_update_bits(codec, RT3261_PWR_DIG1, 0x0080, 0x0080);
-               snd_soc_update_bits(codec, RT3261_PWR_DIG2, 0x8000, 0x8000);
+               snd_soc_update_bits(codec, RT3261_GEN_CTRL1, 0x70, 0x70); //bard 8-29
+               snd_soc_write(codec, RT3261_JD_CTRL, 0x03); //bard 8-29
+               //snd_soc_update_bits(codec, RT3261_PWR_DIG1, 0x0080, 0x0080);
+               //snd_soc_update_bits(codec, RT3261_PWR_DIG2, 0x8000, 0x8000);
+               mutex_lock(&codec->mutex);
+               snd_soc_dapm_force_enable_pin(&codec->dapm, "DAC L2 Power"); //bard 9-4
+               snd_soc_dapm_force_enable_pin(&codec->dapm, "stereo filter"); //bard 9-4
+               snd_soc_dapm_sync(&codec->dapm); //bard 9-4
+               mutex_unlock(&codec->mutex);
+               snd_soc_write(codec, RT3261_ADDA_CLK1, 0x1114);
                break;
 
        default:
@@ -2193,7 +2217,30 @@ static int rt3261_lout_event(struct snd_soc_dapm_widget *w,
 
        return 0;
 }
+//bard 8-29 s
+static int rt3261_dac_event(struct snd_soc_dapm_widget *w, 
+       struct snd_kcontrol *kcontrol, int event)
+{
+       struct snd_soc_codec *codec = w->codec;
+       struct rt3261_priv *rt3261 = snd_soc_codec_get_drvdata(codec);
 
+       switch (event) {
+       case SND_SOC_DAPM_POST_PMU:
+               if( rt3261->asrc_en == RT3261_ASRC_EN)
+                       rt3261_update_eqmode(codec, 2);//BT_VOIP
+               break;
+
+       case SND_SOC_DAPM_PRE_PMD:
+               rt3261_update_eqmode(codec, 0);//NORMAL
+               break;
+
+       default:
+               return 0;
+       }
+
+       return 0;
+}
+//bard 8-29 e
 static const struct snd_soc_dapm_widget rt3261_dapm_widgets[] = {
        SND_SOC_DAPM_SUPPLY("PLL1", RT3261_PWR_ANLG2,
                        RT3261_PWR_PLL_BIT, 0, NULL, 0),
@@ -2359,10 +2406,19 @@ static const struct snd_soc_dapm_widget rt3261_dapm_widgets[] = {
 
        /* Output Side */
        /* DAC mixer before sound effect  */
+#if 0 //org
        SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
                rt3261_dac_l_mix, ARRAY_SIZE(rt3261_dac_l_mix)),
        SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
                rt3261_dac_r_mix, ARRAY_SIZE(rt3261_dac_r_mix)),
+#else //bard 8-29
+       SND_SOC_DAPM_MIXER_E("DAC MIXL", SND_SOC_NOPM, 0, 0,
+               rt3261_dac_l_mix, ARRAY_SIZE(rt3261_dac_l_mix),
+               rt3261_dac_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
+       SND_SOC_DAPM_MIXER_E("DAC MIXR", SND_SOC_NOPM, 0, 0,
+               rt3261_dac_r_mix, ARRAY_SIZE(rt3261_dac_r_mix),
+               rt3261_dac_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
+#endif
 
        /* DAC2 channel Mux */
        SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
@@ -2868,10 +2924,15 @@ static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
 static int get_clk_info(int sclk, int rate)
 {
        int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
+       struct snd_soc_codec *codec = rt3261_codec;
+       struct rt3261_priv *rt3261 = snd_soc_codec_get_drvdata(codec);
 
        if (sclk <= 0 || rate <= 0)
                return -EINVAL;
-
+//bard 8-29 s
+       if (rt3261->asrc_en)
+               return 1;
+//bard 8-29 e
        rate = rate << 8;
        for (i = 0; i < ARRAY_SIZE(pd); i++)
                if (sclk == rate * pd[i])
@@ -2938,16 +2999,20 @@ static int rt3261_hw_params(struct snd_pcm_substream *substream,
                        pre_div << RT3261_I2S_PD1_SFT;
                snd_soc_update_bits(codec, RT3261_I2S1_SDP,
                        RT3261_I2S_DL_MASK, val_len);
-               snd_soc_update_bits(codec, RT3261_ADDA_CLK1, mask_clk, val_clk);
+               //snd_soc_update_bits(codec, RT3261_ADDA_CLK1, mask_clk, val_clk);
        }
        if (dai_sel & RT3261_U_IF2) {
-               mask_clk = RT3261_I2S_BCLK_MS2_MASK | RT3261_I2S_PD2_MASK;
-               val_clk = bclk_ms << RT3261_I2S_BCLK_MS2_SFT |
+               mask_clk |= RT3261_I2S_BCLK_MS2_MASK | RT3261_I2S_PD2_MASK;
+               val_clk |= bclk_ms << RT3261_I2S_BCLK_MS2_SFT |
                        pre_div << RT3261_I2S_PD2_SFT;
                snd_soc_update_bits(codec, RT3261_I2S2_SDP,
                        RT3261_I2S_DL_MASK, val_len);
-               snd_soc_update_bits(codec, RT3261_ADDA_CLK1, mask_clk, val_clk);
+               //snd_soc_update_bits(codec, RT3261_ADDA_CLK1, mask_clk, val_clk);
        }
+       if (rt3261->asrc_en)
+               snd_soc_write(codec, RT3261_ADDA_CLK1, 0x1114);
+       else 
+               snd_soc_update_bits(codec, RT3261_ADDA_CLK1, mask_clk, val_clk);
 
        return 0;
 }
index ba6db7f393c35aa0e66cc071a050c2db495d7a46..639ffcf139c0f43cdb601af9a2c54f6056c65519 100644 (file)
@@ -99,7 +99,8 @@ static int rk29_hw_params(struct snd_pcm_substream *substream,
        DBG("Enter:%s, %d, rate=%d\n", __FUNCTION__, __LINE__, params_rate(params));
 
        /*Set the system clk for codec*/
-       ret = snd_soc_dai_set_sysclk(codec_dai, 0, pll_out, SND_SOC_CLOCK_IN);
+       snd_soc_dai_set_pll(codec_dai, 0, RT3261_PLL1_S_MCLK, pll_out, pll_out*2); //bard 8-29
+       ret = snd_soc_dai_set_sysclk(codec_dai, RT3261_SCLK_S_PLL1, pll_out*2, SND_SOC_CLOCK_IN); //bard 8-29
        if (ret < 0)
        {
                DBG("rk29_hw_params_rt3261:failed to set the sysclk for codec side\n"); 
@@ -108,7 +109,7 @@ static int rk29_hw_params(struct snd_pcm_substream *substream,
 
        snd_soc_dai_set_sysclk(cpu_dai, 0, pll_out, 0);
        snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_BCLK, (pll_out/4)/params_rate(params)-1);
-       snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_MCLK, 3);
+       snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_MCLK, 3);// 256k = 48-1  3M=3
 
        DBG("Enter:%s, %d, pll_out/4/params_rate(params) = %d \n", __FUNCTION__, __LINE__, (pll_out/4)/params_rate(params));
  
@@ -151,9 +152,8 @@ static int rt3261_voice_hw_params(struct snd_pcm_substream *substream,
        DBG("Enter:%s, %d, rate=%d\n", __FUNCTION__, __LINE__, params_rate(params));
 
        /*Set the system clk for codec*/
-       snd_soc_dai_set_pll(codec_dai, 0, RT3261_PLL1_S_MCLK, pll_out, 24576000);
-
-       ret = snd_soc_dai_set_sysclk(codec_dai, RT3261_SCLK_S_PLL1, 24576000, SND_SOC_CLOCK_IN);
+       snd_soc_dai_set_pll(codec_dai, 0, RT3261_PLL1_S_MCLK, pll_out, pll_out*2); //bard 8-29
+       ret = snd_soc_dai_set_sysclk(codec_dai, RT3261_SCLK_S_PLL1, pll_out*2, SND_SOC_CLOCK_IN); //bard 8-29
 
 
        if (ret < 0) {
@@ -162,8 +162,8 @@ static int rt3261_voice_hw_params(struct snd_pcm_substream *substream,
        }
 
        snd_soc_dai_set_sysclk(cpu_dai, 0, pll_out, 0);
-       snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_BCLK, (pll_out/4)/params_rate(params)-1);
-       snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_MCLK, 3);
+       //snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_BCLK, (pll_out/4)/params_rate(params)-1);
+       //snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_MCLK, 3);
 
        DBG("Enter:%s, %d, pll_out/4/params_rate(params) = %d \n", __FUNCTION__, __LINE__, (pll_out/4)/params_rate(params));