[ARM] Orion: Instantiate mv_xor driver for 5182
authorSaeed Bishara <saeed@marvell.com>
Tue, 17 Jun 2008 10:25:12 +0000 (23:25 -1100)
committerLennert Buytenhek <buytenh@marvell.com>
Sat, 9 Aug 2008 13:17:28 +0000 (15:17 +0200)
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
arch/arm/mach-orion5x/common.c
arch/arm/mach-orion5x/common.h
arch/arm/mach-orion5x/include/mach/orion5x.h
arch/arm/mach-orion5x/kurobox_pro-setup.c
arch/arm/mach-orion5x/mss2-setup.c
arch/arm/mach-orion5x/mv2120-setup.c
arch/arm/mach-orion5x/rd88f5182-setup.c
arch/arm/mach-orion5x/ts209-setup.c
arch/arm/mach-orion5x/ts78xx-setup.c

index 8f2146bd8a94156e7848ca680536b266d187961b..7b11e552bc5a89f3eb6ec4d85338157102afefb3 100644 (file)
@@ -27,6 +27,7 @@
 #include <mach/hardware.h>
 #include <mach/orion5x.h>
 #include <plat/ehci-orion.h>
+#include <plat/mv_xor.h>
 #include <plat/orion_nand.h>
 #include <plat/time.h>
 #include "common.h"
@@ -354,6 +355,103 @@ void __init orion5x_uart1_init(void)
 }
 
 
+/*****************************************************************************
+ * XOR engine
+ ****************************************************************************/
+static struct resource orion5x_xor_shared_resources[] = {
+       {
+               .name   = "xor low",
+               .start  = ORION5X_XOR_PHYS_BASE,
+               .end    = ORION5X_XOR_PHYS_BASE + 0xff,
+               .flags  = IORESOURCE_MEM,
+       }, {
+               .name   = "xor high",
+               .start  = ORION5X_XOR_PHYS_BASE + 0x200,
+               .end    = ORION5X_XOR_PHYS_BASE + 0x2ff,
+               .flags  = IORESOURCE_MEM,
+       },
+};
+
+static struct platform_device orion5x_xor_shared = {
+       .name           = MV_XOR_SHARED_NAME,
+       .id             = 0,
+       .num_resources  = ARRAY_SIZE(orion5x_xor_shared_resources),
+       .resource       = orion5x_xor_shared_resources,
+};
+
+static u64 orion5x_xor_dmamask = DMA_32BIT_MASK;
+
+static struct resource orion5x_xor0_resources[] = {
+       [0] = {
+               .start  = IRQ_ORION5X_XOR0,
+               .end    = IRQ_ORION5X_XOR0,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct mv_xor_platform_data orion5x_xor0_data = {
+       .shared         = &orion5x_xor_shared,
+       .hw_id          = 0,
+       .pool_size      = PAGE_SIZE,
+};
+
+static struct platform_device orion5x_xor0_channel = {
+       .name           = MV_XOR_NAME,
+       .id             = 0,
+       .num_resources  = ARRAY_SIZE(orion5x_xor0_resources),
+       .resource       = orion5x_xor0_resources,
+       .dev            = {
+               .dma_mask               = &orion5x_xor_dmamask,
+               .coherent_dma_mask      = DMA_64BIT_MASK,
+               .platform_data          = (void *)&orion5x_xor0_data,
+       },
+};
+
+static struct resource orion5x_xor1_resources[] = {
+       [0] = {
+               .start  = IRQ_ORION5X_XOR1,
+               .end    = IRQ_ORION5X_XOR1,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct mv_xor_platform_data orion5x_xor1_data = {
+       .shared         = &orion5x_xor_shared,
+       .hw_id          = 1,
+       .pool_size      = PAGE_SIZE,
+};
+
+static struct platform_device orion5x_xor1_channel = {
+       .name           = MV_XOR_NAME,
+       .id             = 1,
+       .num_resources  = ARRAY_SIZE(orion5x_xor1_resources),
+       .resource       = orion5x_xor1_resources,
+       .dev            = {
+               .dma_mask               = &orion5x_xor_dmamask,
+               .coherent_dma_mask      = DMA_64BIT_MASK,
+               .platform_data          = (void *)&orion5x_xor1_data,
+       },
+};
+
+void __init orion5x_xor_init(void)
+{
+       platform_device_register(&orion5x_xor_shared);
+
+       /*
+        * two engines can't do memset simultaneously, this limitation
+        * satisfied by removing memset support from one of the engines.
+        */
+       dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask);
+       dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask);
+       platform_device_register(&orion5x_xor0_channel);
+
+       dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask);
+       dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask);
+       dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask);
+       platform_device_register(&orion5x_xor1_channel);
+}
+
+
 /*****************************************************************************
  * Time handling
  ****************************************************************************/
index f72cf0e775448ae5b668acb3bcb6fd90d2d20cb5..e75bd7004b94c2011f01b9f132c6eef3940f28cc 100644 (file)
@@ -32,6 +32,7 @@ void orion5x_i2c_init(void);
 void orion5x_sata_init(struct mv_sata_platform_data *sata_data);
 void orion5x_uart0_init(void);
 void orion5x_uart1_init(void);
+void orion5x_xor_init(void);
 
 /*
  * PCIe/PCI functions.
index 77978dbd5a92183d33aa4c5104d1258bf9e0d7f0..61eb74a88862e051a3da61a2300de4e5c6341932 100644 (file)
 #define ORION5X_USB0_VIRT_BASE         (ORION5X_REGS_VIRT_BASE | 0x50000)
 #define ORION5X_USB0_REG(x)            (ORION5X_USB0_VIRT_BASE | (x))
 
+#define ORION5X_XOR_PHYS_BASE          (ORION5X_REGS_PHYS_BASE | 0x60900)
+#define ORION5X_XOR_VIRT_BASE          (ORION5X_REGS_VIRT_BASE | 0x60900)
+#define ORION5X_XOR_REG(x)             (ORION5X_XOR_VIRT_BASE | (x))
+
 #define ORION5X_ETH_PHYS_BASE          (ORION5X_REGS_PHYS_BASE | 0x70000)
 #define ORION5X_ETH_VIRT_BASE          (ORION5X_REGS_VIRT_BASE | 0x70000)
 #define ORION5X_ETH_REG(x)             (ORION5X_ETH_VIRT_BASE | (x))
index 45dfc9f99d8d67d7bd2ff6bb570d8161dd9ad934..cb72f1bb9cb772a2b18692b255ed2e467d4fc0a7 100644 (file)
@@ -356,6 +356,7 @@ static void __init kurobox_pro_init(void)
        orion5x_sata_init(&kurobox_pro_sata_data);
        orion5x_uart0_init();
        orion5x_uart1_init();
+       orion5x_xor_init();
 
        orion5x_setup_dev_boot_win(KUROBOX_PRO_NOR_BOOT_BASE,
                                   KUROBOX_PRO_NOR_BOOT_SIZE);
index 4403cc963d665be504d2eee536dccb979bfe8dfb..53ff1893b8835e111406affb4dea47d8b835c6d4 100644 (file)
@@ -239,6 +239,7 @@ static void __init mss2_init(void)
        orion5x_i2c_init();
        orion5x_sata_init(&mss2_sata_data);
        orion5x_uart0_init();
+       orion5x_xor_init();
 
        orion5x_setup_dev_boot_win(MSS2_NOR_BOOT_BASE, MSS2_NOR_BOOT_SIZE);
        platform_device_register(&mss2_nor_flash);
index 67b2c0df615fbe58c7f0621d990930e468af84ef..978d4d5993964f93baa09bf387c55881d52494cb 100644 (file)
@@ -203,6 +203,7 @@ static void __init mv2120_init(void)
        orion5x_i2c_init();
        orion5x_sata_init(&mv2120_sata_data);
        orion5x_uart0_init();
+       orion5x_xor_init();
 
        orion5x_setup_dev_boot_win(MV2120_NOR_BOOT_BASE, MV2120_NOR_BOOT_SIZE);
        platform_device_register(&mv2120_nor_flash);
index 8771cb76f0dca72c5b31681ebb82b36170bc8ec8..4c3bcd76ac85ba0ca55f1b40510ac0e93ef04f62 100644 (file)
@@ -292,6 +292,7 @@ static void __init rd88f5182_init(void)
        orion5x_i2c_init();
        orion5x_sata_init(&rd88f5182_sata_data);
        orion5x_uart0_init();
+       orion5x_xor_init();
 
        orion5x_setup_dev_boot_win(RD88F5182_NOR_BOOT_BASE,
                                   RD88F5182_NOR_BOOT_SIZE);
index 1bb7de8a262bb07995af5dcd5df84bbc25f55c60..dd657163cd8d09e48ed791a9a0a472112ba235ba 100644 (file)
@@ -296,6 +296,7 @@ static void __init qnap_ts209_init(void)
        orion5x_i2c_init();
        orion5x_sata_init(&qnap_ts209_sata_data);
        orion5x_uart0_init();
+       orion5x_xor_init();
 
        orion5x_setup_dev_boot_win(QNAP_TS209_NOR_BOOT_BASE,
                                   QNAP_TS209_NOR_BOOT_SIZE);
index 014916a28fdcc31b1db03f97d2f672b4b2e0ba76..ae0a5dccd2a1f465ae9ce4cd3a657d1ffe4a878f 100644 (file)
@@ -256,6 +256,7 @@ static void __init ts78xx_init(void)
        orion5x_sata_init(&ts78xx_sata_data);
        orion5x_uart0_init();
        orion5x_uart1_init();
+       orion5x_xor_init();
 
        orion5x_setup_dev_boot_win(TS78XX_NOR_BOOT_BASE,
                                   TS78XX_NOR_BOOT_SIZE);