Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, not

am2offset.  Modified the instruction table entry and added a new test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101415 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 4c03af8bf0a29e6818815345ac6f7b5b7bec5bf4..f74d19643906ad6cdea33a93686935dcfed1d48b 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -1232,7 +1232,7 @@ def LDRBT : AI2ldbpo<(outs GPR:$dst, GPR:$base_wb),
 }
 
 def LDRSBT : AI3ldsbpo<(outs GPR:$dst, GPR:$base_wb),
-                 (ins GPR:$base,am2offset:$offset), LdMiscFrm, IIC_iLoadru,
+                 (ins GPR:$base,am3offset:$offset), LdMiscFrm, IIC_iLoadru,
                  "ldrsbt", "\t$dst, [$base], $offset", "$base = $base_wb", []> {
   let Inst{21} = 1; // overwrite
 }

diff --git a/test/MC/Disassembler/arm-tests.txt b/test/MC/Disassembler/arm-tests.txt
index 7d10107badf75bf4322e13df44110b03237cbc7e..47374da1949a1225a91b69ee40f511d0befad846 100644 (file)
--- a/test/MC/Disassembler/arm-tests.txt
+++ b/test/MC/Disassembler/arm-tests.txt
@@ -18,6 +18,9 @@
 # CHECK:       ldr     r0, [r2], #15
 0x0f 0x00 0x92 0xe4
 
+# CHECK:       ldrsbtvs        lr, [r2], -r9
+0xd9 0xe9 0x32 0x60
+
 # CHECK:       lsls    r0, r2, #31
 0x82 0x0f 0xb0 0xe1