Move more to raw_ostream, provide support for writing MachineBasicBlock,

LiveInterval, etc to raw_ostream.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76965 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/CodeGen/LiveInterval.h b/include/llvm/CodeGen/LiveInterval.h
index 6910f418767524ef01d4f767f55d98914477c8ac..20943d5aa6da48f4aef338653c83916a8337eb85 100644 (file)
--- a/include/llvm/CodeGen/LiveInterval.h
+++ b/include/llvm/CodeGen/LiveInterval.h
@@ -32,6 +32,7 @@ namespace llvm {
   class MachineInstr;
   class MachineRegisterInfo;
   class TargetRegisterInfo;
+  class raw_ostream;
 
   /// VNInfo - Value Number Information.
   /// This class holds information about a machine level values, including
@@ -192,12 +193,15 @@ namespace llvm {
     void dump() const;
     void print(std::ostream &os) const;
     void print(std::ostream *os) const { if (os) print(*os); }
+    void print(raw_ostream &os) const;
+    void print(raw_ostream *os) const { if (os) print(*os); }
 
   private:
     LiveRange(); // DO NOT IMPLEMENT
   };
 
   std::ostream& operator<<(std::ostream& os, const LiveRange &LR);
+  raw_ostream& operator<<(raw_ostream& os, const LiveRange &LR);
 
 
   inline bool operator<(unsigned V, const LiveRange &LR) {
@@ -584,6 +588,10 @@ namespace llvm {
     void print(std::ostream *OS, const TargetRegisterInfo *TRI = 0) const {
       if (OS) print(*OS, TRI);
     }
+    void print(raw_ostream &OS, const TargetRegisterInfo *TRI = 0) const;
+    void print(raw_ostream *OS, const TargetRegisterInfo *TRI = 0) const {
+      if (OS) print(*OS, TRI);
+    }
     void dump() const;
 
   private:
@@ -599,6 +607,10 @@ namespace llvm {
     LI.print(OS);
     return OS;
   }
+  inline raw_ostream &operator<<(raw_ostream &OS, const LiveInterval &LI) {
+    LI.print(OS);
+    return OS;
+  }
 }
 
 #endif

diff --git a/include/llvm/CodeGen/MachineBasicBlock.h b/include/llvm/CodeGen/MachineBasicBlock.h
index aacc31455eab793f5f2235d1ee5179fd6e8345d1..90d67e567632c1d5a224b01136ff8501f7db3b07 100644 (file)
--- a/include/llvm/CodeGen/MachineBasicBlock.h
+++ b/include/llvm/CodeGen/MachineBasicBlock.h
@@ -21,6 +21,7 @@ namespace llvm {
 
 class BasicBlock;
 class MachineFunction;
+class raw_ostream;
 
 template <>
 struct ilist_traits<MachineInstr> : public ilist_default_traits<MachineInstr> {
@@ -311,6 +312,8 @@ public:
   void dump() const;
   void print(std::ostream &OS) const;
   void print(std::ostream *OS) const { if (OS) print(*OS); }
+  void print(raw_ostream &OS) const;
+  void print(raw_ostream *OS) const { if (OS) print(*OS); }
 
   /// getNumber - MachineBasicBlocks are uniquely numbered at the function
   /// level, unless they're not in a MachineFunction yet, in which case this
@@ -339,6 +342,7 @@ private:   // Methods used to maintain doubly linked list of blocks...
 };
 
 std::ostream& operator<<(std::ostream &OS, const MachineBasicBlock &MBB);
+raw_ostream& operator<<(raw_ostream &OS, const MachineBasicBlock &MBB);
 
 //===--------------------------------------------------------------------===//
 // GraphTraits specializations for machine basic block graphs (machine-CFGs)

diff --git a/lib/CodeGen/LiveInterval.cpp b/lib/CodeGen/LiveInterval.cpp
index c8d3d43e520d81d907531d91838c86cf44ee3ff6..78bde3998c5fa19368a4c57e373157252a1d5fb1 100644 (file)
--- a/lib/CodeGen/LiveInterval.cpp
+++ b/lib/CodeGen/LiveInterval.cpp
@@ -24,6 +24,7 @@
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/Support/Streams.h"
+#include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetRegisterInfo.h"
 #include <algorithm>
 #include <ostream>
@@ -819,6 +820,9 @@ void LiveInterval::ComputeJoinedWeight(const LiveInterval &Other) {
 std::ostream& llvm::operator<<(std::ostream& os, const LiveRange &LR) {
   return os << '[' << LR.start << ',' << LR.end << ':' << LR.valno->id << ")";
 }
+raw_ostream& llvm::operator<<(raw_ostream& os, const LiveRange &LR) {
+  return os << '[' << LR.start << ',' << LR.end << ':' << LR.valno->id << ")";
+}
 
 void LiveRange::dump() const {
   cerr << *this << "\n";
@@ -826,6 +830,12 @@ void LiveRange::dump() const {
 
 void LiveInterval::print(std::ostream &OS,
                          const TargetRegisterInfo *TRI) const {
+  raw_os_ostream RawOS(OS);
+  print(RawOS, TRI);
+}
+
+void LiveInterval::print(raw_ostream &OS,
+                         const TargetRegisterInfo *TRI) const {
   if (isStackSlot())
     OS << "SS#" << getStackSlotIndex();
   else if (TRI && TargetRegisterInfo::isPhysicalRegister(reg))
@@ -890,3 +900,6 @@ void LiveInterval::dump() const {
 void LiveRange::print(std::ostream &os) const {
   os << *this;
 }
+void LiveRange::print(raw_ostream &os) const {
+  os << *this;
+}

diff --git a/lib/CodeGen/MachineBasicBlock.cpp b/lib/CodeGen/MachineBasicBlock.cpp
index 71e6b3e4d0f8694d9cd1d3e94b131cd5a712bdeb..80ca8727f72e0b6f0c0eb2ab753e5dee85b33774 100644 (file)
--- a/lib/CodeGen/MachineBasicBlock.cpp
+++ b/lib/CodeGen/MachineBasicBlock.cpp
@@ -19,6 +19,7 @@
 #include "llvm/Target/TargetInstrDesc.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Support/LeakDetector.h"
+#include "llvm/Support/raw_ostream.h"
 #include <algorithm>
 using namespace llvm;
 
@@ -35,6 +36,10 @@ std::ostream& llvm::operator<<(std::ostream &OS, const MachineBasicBlock &MBB) {
   MBB.print(OS);
   return OS;
 }
+raw_ostream& llvm::operator<<(raw_ostream &OS, const MachineBasicBlock &MBB) {
+  MBB.print(OS);
+  return OS;
+}
 
 /// addNodeToList (MBB) - When an MBB is added to an MF, we need to update the 
 /// parent pointer of the MBB, the MBB numbering, and any instructions in the
@@ -137,7 +142,7 @@ void MachineBasicBlock::dump() const {
   print(*cerr.stream());
 }
 
-static inline void OutputReg(std::ostream &os, unsigned RegNo,
+static inline void OutputReg(raw_ostream &os, unsigned RegNo,
                              const TargetRegisterInfo *TRI = 0) {
   if (!RegNo || TargetRegisterInfo::isPhysicalRegister(RegNo)) {
     if (TRI)
@@ -149,6 +154,11 @@ static inline void OutputReg(std::ostream &os, unsigned RegNo,
 }
 
 void MachineBasicBlock::print(std::ostream &OS) const {
+  raw_os_ostream RawOS(OS);
+  print(RawOS);
+}
+
+void MachineBasicBlock::print(raw_ostream &OS) const {
   const MachineFunction *MF = getParent();
   if(!MF) {
     OS << "Can't print out MachineBasicBlock because parent MachineFunction"

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
index 7aa15bcc6862e97f0b7ffe46d45c4a02cb03b572..4e8e972cf9e3d89ab47ac89bc0a8a0bf25e082f5 100644 (file)
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
@@ -276,19 +276,19 @@ unsigned ScheduleDAGSDNodes::ComputeMemOperandsEnd(SDNode *Node) {
 
 void ScheduleDAGSDNodes::dumpNode(const SUnit *SU) const {
   if (!SU->getNode()) {
-    cerr << "PHYS REG COPY\n";
+    errs() << "PHYS REG COPY\n";
     return;
   }
 
   SU->getNode()->dump(DAG);
-  cerr << "\n";
+  errs() << "\n";
   SmallVector<SDNode *, 4> FlaggedNodes;
   for (SDNode *N = SU->getNode()->getFlaggedNode(); N; N = N->getFlaggedNode())
     FlaggedNodes.push_back(N);
   while (!FlaggedNodes.empty()) {
-    cerr << "    ";
+    errs() << "    ";
     FlaggedNodes.back()->dump(DAG);
-    cerr << "\n";
+    errs() << "\n";
     FlaggedNodes.pop_back();
   }
 }

diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp
index 4d3417fdff514d8ba95d8f58ae8d7ed8684ddef5..7ee4eeb6981d2cd91f8f5b9b7c8dbf024b8f8c0e 100644 (file)
--- a/lib/CodeGen/VirtRegMap.cpp
+++ b/lib/CodeGen/VirtRegMap.cpp
@@ -30,6 +30,7 @@
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/Debug.h"
+#include "llvm/Support/raw_ostream.h"
 #include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/DepthFirstIterator.h"
@@ -259,6 +260,11 @@ bool VirtRegMap::FindUnusedRegisters(LiveIntervals* LIs) {
 }
 
 void VirtRegMap::print(std::ostream &OS, const Module* M) const {
+  raw_os_ostream RawOS(OS);
+  print(RawOS, M);
+}
+
+void VirtRegMap::print(raw_ostream &OS, const Module* M) const {
   const TargetRegisterInfo* TRI = MF->getTarget().getRegisterInfo();
 
   OS << "********** REGISTER MAP **********\n";

diff --git a/lib/CodeGen/VirtRegMap.h b/lib/CodeGen/VirtRegMap.h
index fe767b7671e11b5851caff4f011e05aaa29ea6b2..7d1cf95fce0e4b2c177b9a40e1c7b373f23c9965 100644 (file)
--- a/lib/CodeGen/VirtRegMap.h
+++ b/lib/CodeGen/VirtRegMap.h
@@ -34,6 +34,7 @@ namespace llvm {
   class MachineRegisterInfo;
   class TargetInstrInfo;
   class TargetRegisterInfo;
+  class raw_ostream;
 
   class VirtRegMap : public MachineFunctionPass {
   public:
@@ -483,6 +484,8 @@ namespace llvm {
 
     void print(std::ostream &OS, const Module* M = 0) const;
     void print(std::ostream *OS) const { if (OS) print(*OS); }
+    void print(raw_ostream &OS, const Module* M = 0) const;
+    void print(raw_ostream *OS) const { if (OS) print(*OS); }
     void dump() const;
   };
 
@@ -494,6 +497,14 @@ namespace llvm {
     VRM.print(OS);
     return OS;
   }
+  inline raw_ostream *operator<<(raw_ostream *OS, const VirtRegMap &VRM) {
+    VRM.print(OS);
+    return OS;
+  }
+  inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
+    VRM.print(OS);
+    return OS;
+  }
 } // End llvm namespace
 
 #endif

diff --git a/lib/Transforms/Utils/LowerSwitch.cpp b/lib/Transforms/Utils/LowerSwitch.cpp
index b4121479dba3ce60e2acc5b632a9f9cd0fe7a689..70db29e1c0411775f30182dc386f0bdb55d8644c 100644 (file)
--- a/lib/Transforms/Utils/LowerSwitch.cpp
+++ b/lib/Transforms/Utils/LowerSwitch.cpp
@@ -109,8 +109,8 @@ bool LowerSwitch::runOnFunction(Function &F) {
 
 // operator<< - Used for debugging purposes.
 //
-static std::ostream& operator<<(std::ostream &O,
-                                const LowerSwitch::CaseVector &C) {
+static raw_ostream& operator<<(raw_ostream &O,
+                               const LowerSwitch::CaseVector &C) {
   O << "[";
 
   for (LowerSwitch::CaseVector::const_iterator B = C.begin(),
@@ -123,7 +123,10 @@ static std::ostream& operator<<(std::ostream &O,
 }
 
 static OStream& operator<<(OStream &O, const LowerSwitch::CaseVector &C) {
-  if (O.stream()) *O.stream() << C;
+  if (O.stream()) {
+    raw_os_ostream OS(*O.stream());
+    OS << C;
+  }
   return O;
 }