Add m[tf]vscr intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27420 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/IntrinsicsPowerPC.td b/include/llvm/IntrinsicsPowerPC.td
index 981e88ca8c8f63e0528f25bc4df129cdf6fd7b86..e3699725e79cf9e033732d124c7e7dfd25d00b13 100644 (file)
--- a/include/llvm/IntrinsicsPowerPC.td
+++ b/include/llvm/IntrinsicsPowerPC.td
@@ -66,6 +66,13 @@ class PowerPC_Vec_WWW_Intrinsic<string GCCIntSuffix>
 // PowerPC Altivec Intrinsic Definitions.
 
 let TargetPrefix = "ppc" in {  // All intrinsics start with "llvm.ppc.".
+  // VSCR access.
+  def int_ppc_altivec_mfvscr : GCCBuiltin<"__builtin_altivec_mfvscr">,
+              Intrinsic<[llvm_v8i16_ty], [IntrReadMem]>;
+  def int_ppc_altivec_mtvscr : GCCBuiltin<"__builtin_altivec_mtvscr">,
+              Intrinsic<[llvm_void_ty, llvm_v4i32_ty], [IntrWriteMem]>;
+
+
   // Loads.  These don't map directly to GCC builtins because they represent the
   // source address with a single pointer.
   def int_ppc_altivec_lvx :