video: tegra: de-assert reset after clocks are turned on
authorErik Gilling <konkers@android.com>
Sat, 19 Feb 2011 00:24:37 +0000 (16:24 -0800)
committerErik Gilling <konkers@android.com>
Mon, 28 Feb 2011 22:36:59 +0000 (14:36 -0800)
In underflow recovery, if the clocks are not enabled when the dc is brought
out of reset writes to the DC will sometimes hang.

Change-Id: If37de79f755196550018f94080ab2beed84ca326
Signed-off-by: Erik Gilling <konkers@android.com>
drivers/video/tegra/dc/dc.c

index 1768efbc6e13ae0230afd906056ec43c182245f5..43d31840fd34e28612c931ed50865991cfc2418d 100644 (file)
@@ -1047,6 +1047,9 @@ static bool _tegra_dc_enable(struct tegra_dc *dc)
 
        clk_enable(dc->clk);
        clk_enable(dc->emc_clk);
+       tegra_periph_reset_deassert(dc->clk);
+       msleep(10);
+
        enable_irq(dc->irq);
 
        tegra_dc_init(dc);
@@ -1118,10 +1121,10 @@ static void tegra_dc_reset_worker(struct work_struct *work)
 
        msleep(100);
        tegra_periph_reset_assert(dc->clk);
-       msleep(100);
-       tegra_periph_reset_deassert(dc->clk);
 
+       /* _tegra_dc_enable deasserts reset */
        _tegra_dc_enable(dc);
+
        mutex_unlock(&dc->lock);
 }