ARM a few more VMUL implied destination operand form aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146177 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td
index 7a181a2842fd17fd7c8367b055deee43f9f6e6d0..dc41c68492fd66a20e00cff7f66431e1b520e6f5 100644 (file)
--- a/lib/Target/ARM/ARMInstrNEON.td
+++ b/lib/Target/ARM/ARMInstrNEON.td
@@ -5376,6 +5376,24 @@ defm : VFPDTAnyInstAlias<"vorr${p}", "$Vdn, $Vm",
                          (VORRq QPR:$Vdn, QPR:$Vdn, QPR:$Vm, pred:$p)>;
 
 // VMUL two-operand aliases.
+def : NEONInstAlias<"vmul${p}.p8 $Qdn, $Qm",
+                    (VMULpq QPR:$Qdn, QPR:$Qdn, QPR:$Qm, pred:$p)>;
+def : NEONInstAlias<"vmul${p}.i8 $Qdn, $Qm",
+                    (VMULv16i8 QPR:$Qdn, QPR:$Qdn, QPR:$Qm, pred:$p)>;
+def : NEONInstAlias<"vmul${p}.i16 $Qdn, $Qm",
+                    (VMULv8i16 QPR:$Qdn, QPR:$Qdn, QPR:$Qm, pred:$p)>;
+def : NEONInstAlias<"vmul${p}.i32 $Qdn, $Qm",
+                    (VMULv4i32 QPR:$Qdn, QPR:$Qdn, QPR:$Qm, pred:$p)>;
+
+def : NEONInstAlias<"vmul${p}.p8 $Ddn, $Dm",
+                    (VMULpd DPR:$Ddn, DPR:$Ddn, DPR:$Dm, pred:$p)>;
+def : NEONInstAlias<"vmul${p}.i8 $Ddn, $Dm",
+                    (VMULv8i8 DPR:$Ddn, DPR:$Ddn, DPR:$Dm, pred:$p)>;
+def : NEONInstAlias<"vmul${p}.i16 $Ddn, $Dm",
+                    (VMULv4i16 DPR:$Ddn, DPR:$Ddn, DPR:$Dm, pred:$p)>;
+def : NEONInstAlias<"vmul${p}.i32 $Ddn, $Dm",
+                    (VMULv2i32 DPR:$Ddn, DPR:$Ddn, DPR:$Dm, pred:$p)>;
+
 def : NEONInstAlias<"vmul${p}.f32 $Qdn, $Qm",
                     (VMULfq QPR:$Qdn, QPR:$Qdn, QPR:$Qm, pred:$p)>;
 def : NEONInstAlias<"vmul${p}.f32 $Ddn, $Dm",

diff --git a/test/MC/ARM/neon-mul-encoding.s b/test/MC/ARM/neon-mul-encoding.s
index 990187e78212806961d70bb112055389a8f7d8fd..5b9831e96933b4b0f2f15ab212ac7964203cd03f 100644 (file)
--- a/test/MC/ARM/neon-mul-encoding.s
+++ b/test/MC/ARM/neon-mul-encoding.s
@@ -1,6 +1,5 @@
 @ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s
 
-
        vmul.i8 d16, d16, d17
        vmul.i16        d16, d16, d17
        vmul.i32        d16, d16, d17
@@ -13,6 +12,17 @@
        vmul.p8 q8, q8, q9
        vmul.i16        d18, d8, d0[3]
 
+       vmul.i8 d16, d17
+       vmul.i16        d16, d17
+       vmul.i32        d16, d17
+       vmul.f32        d16, d17
+       vmul.i8 q8, q9
+       vmul.i16        q8, q9
+       vmul.i32        q8, q9
+       vmul.f32        q8, q9
+       vmul.p8 d16, d17
+       vmul.p8 q8, q9
+
 @ CHECK: vmul.i8       d16, d16, d17   @ encoding: [0xb1,0x09,0x40,0xf2]
 @ CHECK: vmul.i16      d16, d16, d17   @ encoding: [0xb1,0x09,0x50,0xf2]
 @ CHECK: vmul.i32      d16, d16, d17   @ encoding: [0xb1,0x09,0x60,0xf2]
@@ -25,6 +35,17 @@
 @ CHECK: vmul.p8       q8, q8, q9      @ encoding: [0xf2,0x09,0x40,0xf3]
 @ CHECK: vmul.i16      d18, d8, d0[3]  @ encoding: [0x68,0x28,0xd8,0xf2]
 
+@ CHECK: vmul.i8       d16, d16, d17   @ encoding: [0xb1,0x09,0x40,0xf2]
+@ CHECK: vmul.i16      d16, d16, d17   @ encoding: [0xb1,0x09,0x50,0xf2]
+@ CHECK: vmul.i32      d16, d16, d17   @ encoding: [0xb1,0x09,0x60,0xf2]
+@ CHECK: vmul.f32      d16, d16, d17   @ encoding: [0xb1,0x0d,0x40,0xf3]
+@ CHECK: vmul.i8       q8, q8, q9      @ encoding: [0xf2,0x09,0x40,0xf2]
+@ CHECK: vmul.i16      q8, q8, q9      @ encoding: [0xf2,0x09,0x50,0xf2]
+@ CHECK: vmul.i32      q8, q8, q9      @ encoding: [0xf2,0x09,0x60,0xf2]
+@ CHECK: vmul.f32      q8, q8, q9      @ encoding: [0xf2,0x0d,0x40,0xf3]
+@ CHECK: vmul.p8       d16, d16, d17   @ encoding: [0xb1,0x09,0x40,0xf3]
+@ CHECK: vmul.p8       q8, q8, q9      @ encoding: [0xf2,0x09,0x40,0xf3]
+
 
        vqdmulh.s16     d16, d16, d17
        vqdmulh.s32     d16, d16, d17