Update for feedback from Jim.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138642 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 7652e8031e8c7bfe4dc9e5bca25b481ba194e0d8..b58cca32afe1b489d04b296acac5575b32112907 100644 (file)
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -2319,13 +2319,13 @@ static DecodeStatus DecodeThumbAddSpecialReg(llvm::MCInst &Inst, uint16_t Insn,
   CHECK(S, DecodetGPRRegisterClass(Inst, dst, Address, Decoder));
 
   switch(Inst.getOpcode()) {
+    default:
+      return Fail;
     case ARM::tADR:
-      break;
+      break; // tADR does not explicitly represent the PC as an oeprand.
     case ARM::tADDrSPi:
       Inst.addOperand(MCOperand::CreateReg(ARM::SP));
       break;
-    default:
-      return Fail;
   }
 
   Inst.addOperand(MCOperand::CreateImm(imm));