If all the bit positions are not specified; do not decode the instructions.

We are bound to fail!  For proper disassembly, the well-known encoding bits
of the instruction must be fully specified.

This also removes pseudo instructions from considerations of disassembly,
which is a better design and less fragile than the name matchings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100899 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/utils/TableGen/ARMDecoderEmitter.cpp b/utils/TableGen/ARMDecoderEmitter.cpp
index 9e8555c4f07abc2e68e74d5bbd64cd28c6be9104..0bb55ce9f3f6071cf5d3da739a9e336c55859125 100644 (file)
--- a/utils/TableGen/ARMDecoderEmitter.cpp
+++ b/utils/TableGen/ARMDecoderEmitter.cpp
@@ -1550,6 +1550,16 @@ bool ARMDecoderEmitter::ARMDEBackend::populateInstruction(
   const StringRef Name = Def.getName();
   uint8_t Form = getByteField(Def, "Form");
 
+  BitsInit &Bits = getBitsField(Def, "Inst");
+
+  // If all the bit positions are not specified; do not decode this instruction.
+  // We are bound to fail!  For proper disassembly, the well-known encoding bits
+  // of the instruction must be fully specified.
+  //
+  // This also removes pseudo instructions from considerations of disassembly,
+  // which is a better design and less fragile than the name matchings.
+  if (Bits.allInComplete()) return false;
+
   if (TN == TARGET_ARM) {
     // FIXME: what about Int_MemBarrierV6 and Int_SyncBarrierV6?
     if ((Name != "Int_MemBarrierV7" && Name != "Int_SyncBarrierV7") &&
@@ -1670,13 +1680,6 @@ bool ARMDecoderEmitter::ARMDEBackend::populateInstruction(
     if (!thumbInstruction(Form))
       return false;
 
-    // Ignore pseudo instructions.
-    if (Name == "tInt_eh_sjlj_setjmp" || Name == "t2Int_eh_sjlj_setjmp" ||
-        Name == "tInt_eh_sjlj_setjmp_nofp" ||
-        Name == "t2Int_eh_sjlj_setjmp_nofp" ||
-        Name == "t2MOVi32imm" || Name == "tBX" || Name == "tBXr9")
-      return false;
-
     // On Darwin R9 is call-clobbered.  Ignore the non-Darwin counterparts.
     if (Name == "tBL" || Name == "tBLXi" || Name == "tBLXr")
       return false;
@@ -1741,8 +1744,6 @@ bool ARMDecoderEmitter::ARMDEBackend::populateInstruction(
   }
 
   DEBUG({
-      BitsInit &Bits = getBitsField(Def, "Inst");
-
       errs() << " ";
 
       // Dumps the instruction encoding bits.

diff --git a/utils/TableGen/Record.h b/utils/TableGen/Record.h
index 55c1a80f9b6a048d3297f6044d3235b9191e0f7c..576d626e069cd31be434ae9e5b593ab612889028 100644 (file)
--- a/utils/TableGen/Record.h
+++ b/utils/TableGen/Record.h
@@ -609,6 +609,11 @@ public:
       if (!getBit(i)->isComplete()) return false;
     return true;
   }
+  bool allInComplete() const {
+    for (unsigned i = 0; i != getNumBits(); ++i)
+      if (getBit(i)->isComplete()) return false;
+    return true;
+  }
   virtual std::string getAsString() const;
 
   virtual Init *resolveReferences(Record &R, const RecordVal *RV);