e1000e: disable gig speed when in S0->Sx transition
authorBruce Allan <bruce.w.allan@intel.com>
Thu, 17 Jun 2010 18:59:48 +0000 (18:59 +0000)
committerDavid S. Miller <davem@davemloft.net>
Wed, 23 Jun 2010 19:58:40 +0000 (12:58 -0700)
Most of this workaround is necessary for all ICHx/PCH parts so one of
the two MAC-type checks can be removed.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/e1000e/ich8lan.c

index c7292a1a81efa6e8add800bf1d2b541d8932e551..6b5e108bb51ffd64e733c5509ba7fb64ad14ca6e 100644 (file)
@@ -3457,21 +3457,12 @@ void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw)
 {
        u32 phy_ctrl;
 
-       switch (hw->mac.type) {
-       case e1000_ich8lan:
-       case e1000_ich9lan:
-       case e1000_ich10lan:
-       case e1000_pchlan:
-               phy_ctrl = er32(PHY_CTRL);
-               phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU |
-                           E1000_PHY_CTRL_GBE_DISABLE;
-               ew32(PHY_CTRL, phy_ctrl);
+       phy_ctrl = er32(PHY_CTRL);
+       phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU | E1000_PHY_CTRL_GBE_DISABLE;
+       ew32(PHY_CTRL, phy_ctrl);
 
-               if (hw->mac.type == e1000_pchlan)
-                       e1000_phy_hw_reset_ich8lan(hw);
-       default:
-               break;
-       }
+       if (hw->mac.type >= e1000_pchlan)
+               e1000_phy_hw_reset_ich8lan(hw);
 }
 
 /**