drm/amdgpu: add kernel fence in ib_submit_kernel_helper
authorChunming Zhou <david1.zhou@amd.com>
Mon, 3 Aug 2015 03:43:19 +0000 (11:43 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 17 Aug 2015 20:50:54 +0000 (16:50 -0400)
every sbumission should be able to get a fence.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <jammy.zhou@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_sched.c
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
drivers/gpu/drm/amd/amdgpu/cik_sdma.c
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c

index 371ff0845989513c7c20aeb2118e58e57ec643ad..e1f093c1f011d19d73e8ebf760a2d950d44f12c5 100644 (file)
@@ -872,7 +872,8 @@ int amdgpu_sched_ib_submit_kernel_helper(struct amdgpu_device *adev,
                                         struct amdgpu_ib *ibs,
                                         unsigned num_ibs,
                                         int (*free_job)(struct amdgpu_cs_parser *),
-                                        void *owner);
+                                        void *owner,
+                                        struct fence **fence);
 
 struct amdgpu_ring {
        struct amdgpu_device            *adev;
index 161c83ad9349b3cc939a65a530a95377ab895af5..23a17ec239c009558875ccb6206d697c5e0b209f 100644 (file)
@@ -107,7 +107,8 @@ int amdgpu_sched_ib_submit_kernel_helper(struct amdgpu_device *adev,
                                         struct amdgpu_ib *ibs,
                                         unsigned num_ibs,
                                         int (*free_job)(struct amdgpu_cs_parser *),
-                                        void *owner)
+                                        void *owner,
+                                        struct fence **f)
 {
        int r = 0;
        if (amdgpu_enable_scheduler) {
@@ -135,5 +136,8 @@ int amdgpu_sched_ib_submit_kernel_helper(struct amdgpu_device *adev,
                        WARN(true, "emit timeout\n");
        } else
                r = amdgpu_ib_schedule(adev, 1, ibs, owner);
-       return r;
+       if (r)
+               return r;
+       *f = &ibs[num_ibs - 1].fence->base;
+       return 0;
 }
index 9b2730599134ac422f8f097aec5efa242fcfa3bf..f114c6b49b9dc9feedd1794d98b624099ae3ba9f 100644 (file)
@@ -825,6 +825,7 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring,
        struct ww_acquire_ctx ticket;
        struct list_head head;
        struct amdgpu_ib *ib = NULL;
+       struct fence *f = NULL;
        struct amdgpu_device *adev = ring->adev;
        uint64_t addr;
        int i, r;
@@ -869,14 +870,15 @@ static int amdgpu_uvd_send_msg(struct amdgpu_ring *ring,
 
        r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, ib, 1,
                                                 &amdgpu_uvd_free_job,
-                                                AMDGPU_FENCE_OWNER_UNDEFINED);
+                                                AMDGPU_FENCE_OWNER_UNDEFINED,
+                                                &f);
        if (r)
                goto err2;
 
-       ttm_eu_fence_buffer_objects(&ticket, &head, &ib->fence->base);
+       ttm_eu_fence_buffer_objects(&ticket, &head, f);
 
        if (fence)
-               *fence = fence_get(&ib->fence->base);
+               *fence = fence_get(f);
        amdgpu_bo_unref(&bo);
 
        if (amdgpu_enable_scheduler)
index 94c40ca5ba74b3f832609d0547c5cb85c7a085eb..38660eac67d695c80ca317ee39c4c70726fa8617 100644 (file)
@@ -362,6 +362,7 @@ int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
 {
        const unsigned ib_size_dw = 1024;
        struct amdgpu_ib *ib = NULL;
+       struct fence *f = NULL;
        struct amdgpu_device *adev = ring->adev;
        uint64_t dummy;
        int i, r;
@@ -408,11 +409,12 @@ int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
 
        r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, ib, 1,
                                                 &amdgpu_vce_free_job,
-                                                AMDGPU_FENCE_OWNER_UNDEFINED);
+                                                AMDGPU_FENCE_OWNER_UNDEFINED,
+                                                &f);
        if (r)
                goto err;
        if (fence)
-               *fence = fence_get(&ib->fence->base);
+               *fence = fence_get(f);
        if (amdgpu_enable_scheduler)
                return 0;
 err:
@@ -436,6 +438,7 @@ int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
 {
        const unsigned ib_size_dw = 1024;
        struct amdgpu_ib *ib = NULL;
+       struct fence *f = NULL;
        struct amdgpu_device *adev = ring->adev;
        uint64_t dummy;
        int i, r;
@@ -472,11 +475,12 @@ int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
                ib->ptr[i] = 0x0;
        r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, ib, 1,
                                                 &amdgpu_vce_free_job,
-                                                AMDGPU_FENCE_OWNER_UNDEFINED);
+                                                AMDGPU_FENCE_OWNER_UNDEFINED,
+                                                &f);
        if (r)
                goto err;
        if (fence)
-               *fence = fence_get(&ib->fence->base);
+               *fence = fence_get(f);
        if (amdgpu_enable_scheduler)
                return 0;
 err:
index 115b7706e025aa79a05255556bd1408ec67e22ec..c3ed5b22d7327217794a22c0f3b5dfa1801db127 100644 (file)
@@ -614,6 +614,7 @@ static int cik_sdma_ring_test_ib(struct amdgpu_ring *ring)
 {
        struct amdgpu_device *adev = ring->adev;
        struct amdgpu_ib ib;
+       struct fence *f = NULL;
        unsigned i;
        unsigned index;
        int r;
@@ -642,11 +643,12 @@ static int cik_sdma_ring_test_ib(struct amdgpu_ring *ring)
        ib.ptr[4] = 0xDEADBEEF;
        ib.length_dw = 5;
        r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,
-                                                AMDGPU_FENCE_OWNER_UNDEFINED);
+                                                AMDGPU_FENCE_OWNER_UNDEFINED,
+                                                &f);
        if (r)
                goto err1;
 
-       r = fence_wait(&ib.fence->base, false);
+       r = fence_wait(f, false);
        if (r) {
                DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
                goto err1;
index 521d811996f9d42cb275706e083ed401751cb99a..ee1c47f9a2b60e2aa6fac2b7aab2a6cf42915d74 100644 (file)
@@ -2648,6 +2648,7 @@ static int gfx_v7_0_ring_test_ib(struct amdgpu_ring *ring)
 {
        struct amdgpu_device *adev = ring->adev;
        struct amdgpu_ib ib;
+       struct fence *f = NULL;
        uint32_t scratch;
        uint32_t tmp = 0;
        unsigned i;
@@ -2670,11 +2671,12 @@ static int gfx_v7_0_ring_test_ib(struct amdgpu_ring *ring)
        ib.length_dw = 3;
 
        r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,
-                                                AMDGPU_FENCE_OWNER_UNDEFINED);
+                                                AMDGPU_FENCE_OWNER_UNDEFINED,
+                                                &f);
        if (r)
                goto err2;
 
-       r = fence_wait(&ib.fence->base, false);
+       r = fence_wait(f, false);
        if (r) {
                DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
                goto err2;
index 59eae93804c351d47e9d42ba19eb8f1c3b0375ec..a865d96b67af3d5ba56227d2bf049c99fcfd17fc 100644 (file)
@@ -610,6 +610,7 @@ static int gfx_v8_0_ring_test_ib(struct amdgpu_ring *ring)
 {
        struct amdgpu_device *adev = ring->adev;
        struct amdgpu_ib ib;
+       struct fence *f = NULL;
        uint32_t scratch;
        uint32_t tmp = 0;
        unsigned i;
@@ -632,11 +633,12 @@ static int gfx_v8_0_ring_test_ib(struct amdgpu_ring *ring)
        ib.length_dw = 3;
 
        r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,
-                                                AMDGPU_FENCE_OWNER_UNDEFINED);
+                                                AMDGPU_FENCE_OWNER_UNDEFINED,
+                                                &f);
        if (r)
                goto err2;
 
-       r = fence_wait(&ib.fence->base, false);
+       r = fence_wait(f, false);
        if (r) {
                DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
                goto err2;
index 2b7ce9393929ab0b35aff9bd70670f760489aa98..6de7dc88d53ceaa6dfd3c8dc0167b40a4dc71ce6 100644 (file)
@@ -673,6 +673,7 @@ static int sdma_v2_4_ring_test_ib(struct amdgpu_ring *ring)
 {
        struct amdgpu_device *adev = ring->adev;
        struct amdgpu_ib ib;
+       struct fence *f = NULL;
        unsigned i;
        unsigned index;
        int r;
@@ -706,11 +707,12 @@ static int sdma_v2_4_ring_test_ib(struct amdgpu_ring *ring)
        ib.length_dw = 8;
 
        r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,
-                                                AMDGPU_FENCE_OWNER_UNDEFINED);
+                                                AMDGPU_FENCE_OWNER_UNDEFINED,
+                                                &f);
        if (r)
                goto err1;
 
-       r = fence_wait(&ib.fence->base, false);
+       r = fence_wait(f, false);
        if (r) {
                DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
                goto err1;
index cba45e62ae4b46c985996a37a016c96c0267ed68..963a991fea00bfd262a76197007ec5a739edaf60 100644 (file)
@@ -794,6 +794,7 @@ static int sdma_v3_0_ring_test_ib(struct amdgpu_ring *ring)
 {
        struct amdgpu_device *adev = ring->adev;
        struct amdgpu_ib ib;
+       struct fence *f = NULL;
        unsigned i;
        unsigned index;
        int r;
@@ -827,11 +828,12 @@ static int sdma_v3_0_ring_test_ib(struct amdgpu_ring *ring)
        ib.length_dw = 8;
 
        r = amdgpu_sched_ib_submit_kernel_helper(adev, ring, &ib, 1, NULL,
-                                                AMDGPU_FENCE_OWNER_UNDEFINED);
+                                                AMDGPU_FENCE_OWNER_UNDEFINED,
+                                                &f);
        if (r)
                goto err1;
 
-       r = fence_wait(&ib.fence->base, false);
+       r = fence_wait(f, false);
        if (r) {
                DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
                goto err1;