[mips] Attempting to use register $32 should be an error instead of an assertion.
authorDaniel Sanders <daniel.sanders@imgtec.com>
Thu, 27 Mar 2014 15:00:44 +0000 (15:00 +0000)
committerDaniel Sanders <daniel.sanders@imgtec.com>
Thu, 27 Mar 2014 15:00:44 +0000 (15:00 +0000)
Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3201

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204932 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Mips/AsmParser/MipsAsmParser.cpp
test/MC/Mips/mips-register-names-invalid.s [new file with mode: 0644]

index 602bf04dac3249437990f81c62d0f88e7447da27..5bc8f9d4b63429f5214d9cc7382a27925dd21b2d 100644 (file)
@@ -1217,7 +1217,7 @@ unsigned MipsAsmParser::getGPR(int RegNo) {
 
 int MipsAsmParser::matchRegisterByNumber(unsigned RegNum, unsigned RegClass) {
   if (RegNum >
-      getContext().getRegisterInfo()->getRegClass(RegClass).getNumRegs())
+      getContext().getRegisterInfo()->getRegClass(RegClass).getNumRegs() - 1)
     return -1;
 
   if (RegClass == Mips::GPR32RegClassID || RegClass == Mips::GPR64RegClassID)
diff --git a/test/MC/Mips/mips-register-names-invalid.s b/test/MC/Mips/mips-register-names-invalid.s
new file mode 100644 (file)
index 0000000..df1054f
--- /dev/null
@@ -0,0 +1,8 @@
+# RUN: not llvm-mc %s -triple=mips-unknown-freebsd -show-encoding 2>%t0
+# RUN: FileCheck %s < %t0
+
+# $32 used to trigger an assertion instead of the usual error message due to
+# an off-by-one bug.
+
+# CHECK: :[[@LINE+1]]:18: error: invalid operand for instruction
+        add     $32, $0, $0