dmaengine: sun6i: Remove obsolete clk muxing code

The sun6i DMA controller requires the AHB1 bus clock to be
clocked from PLL6. This was originally done by the dmaengine
driver during probe time. The AHB1 clock driver has since been
unified, so the original code does not work.

Remove the clk muxing code, and replace it with DT clk default
properties.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index 1f92a56fd2b6c38279872a2257d997b9ec2ff9ca..3aa10b32825491dce9d5c0ad244ddc53f78df12e 100644 (file)
--- a/drivers/dma/sun6i-dma.c
+++ b/drivers/dma/sun6i-dma.c
@@ -862,7 +862,6 @@ static int sun6i_dma_probe(struct platform_device *pdev)
 {
        struct sun6i_dma_dev *sdc;
        struct resource *res;
-       struct clk *mux, *pll6;
        int ret, i;
 
        sdc = devm_kzalloc(&pdev->dev, sizeof(*sdc), GFP_KERNEL);
@@ -886,28 +885,6 @@ static int sun6i_dma_probe(struct platform_device *pdev)
                return PTR_ERR(sdc->clk);
        }
 
-       mux = clk_get(NULL, "ahb1_mux");
-       if (IS_ERR(mux)) {
-               dev_err(&pdev->dev, "Couldn't get AHB1 Mux\n");
-               return PTR_ERR(mux);
-       }
-
-       pll6 = clk_get(NULL, "pll6");
-       if (IS_ERR(pll6)) {
-               dev_err(&pdev->dev, "Couldn't get PLL6\n");
-               clk_put(mux);
-               return PTR_ERR(pll6);
-       }
-
-       ret = clk_set_parent(mux, pll6);
-       clk_put(pll6);
-       clk_put(mux);
-
-       if (ret) {
-               dev_err(&pdev->dev, "Couldn't reparent AHB1 on PLL6\n");
-               return ret;
-       }
-
        sdc->rstc = devm_reset_control_get(&pdev->dev, NULL);
        if (IS_ERR(sdc->rstc)) {
                dev_err(&pdev->dev, "No reset controller specified\n");