assert(Subtarget->hasAVX2() && "We can only lower v16i16 with AVX2!");
// FIXME: Actually implement this using AVX2!!!
+ (void)Mask;
return splitAndLower256BitVectorShuffle(Op, V1, V2, Subtarget, DAG);
}
assert(V2.getSimpleValueType() == MVT::v32i8 && "Bad operand type!");
ShuffleVectorSDNode *SVOp = cast<ShuffleVectorSDNode>(Op);
ArrayRef<int> Mask = SVOp->getMask();
- assert(Mask.size() == 32 && "Unexpected mask size for v32 shuffle!");
+ assert(.size() == 32 && "Unexpected mask size for v32 shuffle!");
assert(Subtarget->hasAVX2() && "We can only lower v32i8 with AVX2!");
// FIXME: Actually implement this using AVX2!!!
+ (void)Mask;
return splitAndLower256BitVectorShuffle(Op, V1, V2, Subtarget, DAG);
}