ARM64: dts: rk3399: Add pd/clk for iommu
authorSimon <xxm@rock-chips.com>
Mon, 19 Dec 2016 12:20:33 +0000 (20:20 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Tue, 7 Mar 2017 02:04:46 +0000 (10:04 +0800)
Change-Id: I6da7372e82a031140fead601a0661260be75855b
Signed-off-by: Simon <xxm@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3399.dtsi

index 7b0df6b873171ac23c7586ce3ec9a3cdd77eeb85..df9f1c7d7c5f6a6c1b835af8b35f1d0bb1e55b98 100644 (file)
                reg = <0x0 0xff650800 0x0 0x40>;
                interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
                interrupt-names = "vpu_mmu";
+               clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+               clock-names = "aclk", "hclk";
+               power-domains = <&power RK3399_PD_VCODEC>;
                #iommu-cells = <0>;
        };
 
                reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
                interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
                interrupt-names = "vdec_mmu";
+               clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>;
+               clock-names = "aclk", "hclk";
+               power-domains = <&power RK3399_PD_VDU>;
                #iommu-cells = <0>;
        };
 
                reg = <0x0 0xff8f3f00 0x0 0x100>;
                interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
                interrupt-names = "vopl_mmu";
+               clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
+               clock-names = "aclk", "hclk";
+               power-domains = <&power RK3399_PD_VOPL>;
                #iommu-cells = <0>;
                status = "disabled";
        };
                reg = <0x0 0xff903f00 0x0 0x100>;
                interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
                interrupt-names = "vopb_mmu";
+               clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
+               clock-names = "aclk", "hclk";
+               power-domains = <&power RK3399_PD_VOPB>;
                #iommu-cells = <0>;
                status = "disabled";
        };
                interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
                interrupt-names = "isp0_mmu";
                #iommu-cells = <0>;
+               clocks = <&cru ACLK_ISP0_NOC>, <&cru HCLK_ISP0_NOC>;
+               clock-names = "aclk", "hclk";
+               power-domains = <&power RK3399_PD_ISP0>;
                rk_iommu,disable_reset_quirk;
                status = "disabled";
        };
                interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
                interrupt-names = "isp1_mmu";
                #iommu-cells = <0>;
+               clocks = <&cru ACLK_ISP1_NOC>, <&cru HCLK_ISP1_NOC>;
+               clock-names = "aclk", "hclk";
+               power-domains = <&power RK3399_PD_ISP1>;
                rk_iommu,disable_reset_quirk;
                status = "disabled";
        };