arm64: dts: rockchip: rk3368: add hdmi node
authorZheng Yang <zhengyang@rock-chips.com>
Mon, 15 Feb 2016 08:48:01 +0000 (16:48 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Wed, 17 Feb 2016 08:31:09 +0000 (16:31 +0800)
Change-Id: I7c9a7a0a2befb6635f7b77c0c779a3420e9f3e7b
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3368.dtsi

index d58a116a9b88ac338e523baa657a6608768933d6..ff74e3ca522fa8f86a734213ff4e36bb12097002 100644 (file)
                        };
                };
 
+               hdmi_i2c {
+                       hdmii2c_xfer: hdmii2c-xfer {
+                               rockchip,pins = <3 26 RK_FUNC_1 &pcfg_pull_none>,
+                                               <3 27 RK_FUNC_1 &pcfg_pull_none>;
+                       };
+               };
+
+               hdmi_pin {
+                       hdmi_cec: hdmi-cec {
+                               rockchip,pins = <3 23 RK_FUNC_1 &pcfg_pull_none>;
+                       };
+               };
+
                i2c0 {
                        i2c0_xfer: i2c0-xfer {
                                rockchip,pins = <0 6 RK_FUNC_1 &pcfg_pull_none>,
                                rockchip,pins = <3 26 RK_FUNC_2 &pcfg_pull_none>,
                                                <3 27 RK_FUNC_2 &pcfg_pull_none>;
                        };
+                       i2c5_gpio: i2c5-gpio {
+                               rockchip,pins = <3 26 RK_FUNC_GPIO &pcfg_pull_none>,
+                                               <3 27 RK_FUNC_GPIO &pcfg_pull_none>;
+                       };
                };
 
                i2s {
                status = "disabled";
        };
 
+       hdmi: hdmi@ff980000 {
+               compatible = "rockchip,rk3368-hdmi";
+               reg = <0x0 0xff980000 0x0 0x20000>;
+               interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru PCLK_HDMI_CTRL>,
+                        <&cru SCLK_HDMI_HDCP>,
+                        <&cru SCLK_HDMI_CEC>;
+               clock-names = "pclk_hdmi", "hdcp_clk_hdmi", "cec_clk_hdmi";
+               /*power-domains = <&power PD_VIO>;*/
+               resets = <&cru SRST_HDMI>;
+               reset-names = "hdmi";
+               pinctrl-names = "default", "gpio";
+               pinctrl-0 = <&hdmii2c_xfer &hdmi_cec>;
+               pinctrl-1 = <&i2c5_gpio>;
+               status = "disabled";
+       };
+
        iep_mmu: iep-mmu {
                dbgname = "iep";
                compatible = "rockchip,iep_mmu";