RK3368: vpu for rk3368, compatible for 32bits and 64bits operation.
authorAlpha Lin <alpha.lin@rock-chips.com>
Wed, 7 Jan 2015 08:29:10 +0000 (16:29 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Mon, 12 Jan 2015 12:09:08 +0000 (20:09 +0800)
Signed-off-by: Alpha Lin <alpha.lin@rock-chips.com>
arch/arm/mach-rockchip/vcodec_service.c
arch/arm64/boot/dts/rk3368.dtsi
arch/arm64/mach-rockchip/Makefile

index b472d3ad47df724e199044dec7b084921956b945..ed19973deddf42743fd75b41b9b0362da9eae987 100644 (file)
@@ -334,7 +334,7 @@ typedef struct vpu_reg {
 #if defined(CONFIG_VCODEC_MMU)
        struct list_head mem_region_list;
 #endif
-       unsigned long *reg;
+       u32 *reg;
 } vpu_reg;
 
 typedef struct vpu_device {
@@ -471,7 +471,7 @@ struct vcodec_combo {
 };
 
 typedef struct vpu_request {
-       unsigned long *req;
+       u64 req;
        u32 size;
 } vpu_request;
 
@@ -570,18 +570,17 @@ static int vpu_get_clk(struct vpu_service_info *pservice)
 #if VCODEC_CLOCK_ENABLE
        switch (pservice->dev_id) {
        case VCODEC_DEVICE_ID_HEVC:
-               pservice->clk_cabac = devm_clk_get(pservice->dev, "clk_cabac");
-               if (IS_ERR(pservice->clk_cabac)) {
-                       dev_err(pservice->dev, "failed on clk_get clk_cabac\n");
-                       return -1;
-               }
-
                pservice->pd_video = devm_clk_get(pservice->dev, "pd_hevc");
                if (IS_ERR(pservice->pd_video)) {
                        dev_err(pservice->dev, "failed on clk_get pd_hevc\n");
                        return -1;
                }
        case VCODEC_DEVICE_ID_COMBO:
+               pservice->clk_cabac = devm_clk_get(pservice->dev, "clk_cabac");
+               if (IS_ERR(pservice->clk_cabac)) {
+                       dev_err(pservice->dev, "failed on clk_get clk_cabac\n");
+                       pservice->clk_cabac = NULL;
+               }
                pservice->clk_core = devm_clk_get(pservice->dev, "clk_core");
                if (IS_ERR(pservice->clk_core)) {
                        dev_err(pservice->dev, "failed on clk_get clk_core\n");
@@ -796,13 +795,13 @@ static void vpu_service_power_on(struct vpu_service_info *pservice)
 
 static inline bool reg_check_rmvb_wmv(vpu_reg *reg)
 {
-       unsigned long type = (reg->reg[3] & 0xF0000000) >> 28;
+       u32 type = (reg->reg[3] & 0xF0000000) >> 28;
        return ((type == 8) || (type == 4));
 }
 
 static inline bool reg_check_interlace(vpu_reg *reg)
 {
-       unsigned long type = (reg->reg[3] & (1 << 23));
+       u32 type = (reg->reg[3] & (1 << 23));
        return (type > 0);
 }
 
@@ -1055,7 +1054,7 @@ static vpu_reg *reg_init(struct vpu_subdev_data *data,
        reg->type = session->type;
        reg->size = size;
        reg->freq = VPU_FREQ_DEFAULT;
-       reg->reg = (unsigned long *)&reg[1];
+       reg->reg = (u32 *)&reg[1];
        INIT_LIST_HEAD(&reg->session_link);
        INIT_LIST_HEAD(&reg->status_link);
 
@@ -1296,7 +1295,7 @@ static void reg_copy_to_hw(struct vpu_subdev_data *data, vpu_reg *reg)
 
                VEPU_CLEAN_CACHE(dst);
 
-               dsb();
+               dsb(sy);
 
                dst[VPU_REG_ENC_GATE] = src[VPU_REG_ENC_GATE] | VPU_REG_ENC_GATE_BIT;
                dst[VPU_REG_EN_ENC]   = src[VPU_REG_EN_ENC];
@@ -1321,7 +1320,7 @@ static void reg_copy_to_hw(struct vpu_subdev_data *data, vpu_reg *reg)
                        HEVC_CLEAN_CACHE(dst);
                }
 
-               dsb();
+               dsb(sy);
 
                if (data->hw_info->hw_id != HEVC_ID) {
                        dst[VPU_REG_DEC_GATE] = src[VPU_REG_DEC_GATE] | VPU_REG_DEC_GATE_BIT;
@@ -1329,8 +1328,8 @@ static void reg_copy_to_hw(struct vpu_subdev_data *data, vpu_reg *reg)
                } else {
                        dst[VPU_REG_EN_DEC] = src[VPU_REG_EN_DEC];
                }
-               dsb();
-               dmb();
+               dsb(sy);
+               dmb(sy);
 #if VPU_SERVICE_SHOW_TIME
                do_gettimeofday(&dec_start);
 #endif
@@ -1344,7 +1343,7 @@ static void reg_copy_to_hw(struct vpu_subdev_data *data, vpu_reg *reg)
                for (i = VPU_REG_PP_GATE + 1; i < REG_NUM_9190_PP; i++)
                        dst[i] = src[i];
 
-               dsb();
+               dsb(sy);
 
                dst[VPU_REG_EN_PP] = src[VPU_REG_EN_PP];
 #if VPU_SERVICE_SHOW_TIME
@@ -1364,7 +1363,7 @@ static void reg_copy_to_hw(struct vpu_subdev_data *data, vpu_reg *reg)
                        dst[i] = src[i];
 
                dst[VPU_REG_EN_DEC_PP]   = src[VPU_REG_EN_DEC_PP] | 0x2;
-               dsb();
+               dsb(sy);
 
                dst[VPU_REG_DEC_PP_GATE] = src[VPU_REG_DEC_PP_GATE] | VPU_REG_PP_GATE_BIT;
                dst[VPU_REG_DEC_GATE]    = src[VPU_REG_DEC_GATE]    | VPU_REG_DEC_GATE_BIT;
index a1144490b83c6ef32adeb2ed78e5d3a679acfb36..1fc965d295480e8a46d9ca86b6fd65e04dafe724 100755 (executable)
                };
        };
 
-       vpu: vpu_service@ff9a0000 {
-               compatible = "vpu_service";
+       vpu: vpu_service {
+               compatible = "rockchip,vpu_sub";
                iommu_enabled = <0>;
-               reg = <0x0 0xff9a0000 0x0 0x800>;
-               interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+               interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-names = "irq_enc", "irq_dec";
-               /*
-               clocks = <&clk_vdpu>, <&hclk_vdpu>;
-               clock-names = "aclk_vcodec", "hclk_vcodec";
-               */
+               dev_mode = <0>;
                name = "vpu_service";
-               /* status = "disabled"; */
+       };
+
+       hevc: hevc_service {
+               compatible = "rockchip,hevc_sub";
+               iommu_enabled = <0>;
+               interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+               interrupts-names = "irq_dec";
+               dev_mode = <1>;
+               name = "hevc_service";
+       };
+
+       vpu_combo: vpu_combo@ff9a0000 {
+               compatible = "rockchip,vpu_combo";
+               reg = <0x0 0xff9a0000 0x0 0x800>;
+               rockchip,grf = <&grf>;
+               subcnt = <2>;
+               rockchip,sub = <&vpu>, <&hevc>;
+               clocks = <&aclk_vdpu>, <&hclk_vdpu>, <&clk_hevc_core>, <&clk_hevc_cabac>;
+               clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core", "clk_cabac";
+               mode_bit = <12>;
+               mode_ctrl = <0x418>;
+               name = "vpu_combo";
+               status = "okay";
        };
 
        iep: iep@ff900000 {
index 70bbc24b217e0688f8113f083a17825cd90b4770..48db687352625692ff1792691b78f2887d9ba9a8 100644 (file)
@@ -8,3 +8,4 @@ obj-$(CONFIG_RK_LAST_LOG) += ../../arm/mach-rockchip/last_log.o
 obj-$(CONFIG_DVFS) += ../../arm/mach-rockchip/dvfs.o
 obj-$(CONFIG_BLOCK_RKNAND) += ../../arm/mach-rockchip/rknandbase.o
 obj-$(CONFIG_RK_PL330_DMA_TEST) += ../../arm/mach-rockchip/dma_memcpy_test.o
+obj-$(CONFIG_RK_VCODEC) += ../../arm/mach-rockchip/vcodec_service.o