"vinsertf128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
[]>, VEX_4V;
+// Extract packed floating-point values
+def VEXTRACTF128rr : AVXAIi8<0x19, MRMDestReg, (outs VR128:$dst),
+ (ins VR256:$src1, i8imm:$src2),
+ "vextractf128\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+ []>, VEX;
+def VEXTRACTF128mr : AVXAIi8<0x19, MRMDestMem, (outs),
+ (ins f128mem:$dst, VR256:$src1, i8imm:$src2),
+ "vextractf128\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+ []>, VEX;
+
} // isAsmParserOnly
// CHECK: encoding: [0xc4,0xe3,0x6d,0x18,0x28,0x07]
vinsertf128 $7, (%eax), %ymm2, %ymm5
+// CHECK: vextractf128 $7, %ymm2, %xmm2
+// CHECK: encoding: [0xc4,0xe3,0x7d,0x19,0xd2,0x07]
+ vextractf128 $7, %ymm2, %xmm2
+
+// CHECK: vextractf128 $7, %ymm2, (%eax)
+// CHECK: encoding: [0xc4,0xe3,0x7d,0x19,0x10,0x07]
+ vextractf128 $7, %ymm2, (%eax)
+
// CHECK: encoding: [0xc4,0x63,0x1d,0x18,0x10,0x07]
vinsertf128 $7, (%rax), %ymm12, %ymm10
+// CHECK: vextractf128 $7, %ymm12, %xmm12
+// CHECK: encoding: [0xc4,0x43,0x7d,0x19,0xe4,0x07]
+ vextractf128 $7, %ymm12, %xmm12
+
+// CHECK: vextractf128 $7, %ymm12, (%rax)
+// CHECK: encoding: [0xc4,0x63,0x7d,0x19,0x20,0x07]
+ vextractf128 $7, %ymm12, (%rax)
+