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Floating point instructions like Floating point registers
author
Andrew Lenharth
<andrewl@lenharth.org>
Thu, 27 Jan 2005 07:58:15 +0000
(07:58 +0000)
committer
Andrew Lenharth
<andrewl@lenharth.org>
Thu, 27 Jan 2005 07:58:15 +0000
(07:58 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19856
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/Alpha/AlphaISelPattern.cpp
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diff --git
a/lib/Target/Alpha/AlphaISelPattern.cpp
b/lib/Target/Alpha/AlphaISelPattern.cpp
index b9abf4661b473434de1d3244a3af4e0112bd2649..bae321edaad2f3d6a836f49c43cb45fc1b8195af 100644
(file)
--- a/
lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/
lib/Target/Alpha/AlphaISelPattern.cpp
@@
-333,7
+333,7
@@
unsigned ISel::SelectExpr(SDOperand N) {
if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(N)) {
if (CN->isExactlyValue(+0.0) ||
CN->isExactlyValue(-0.0)) {
- BuildMI(BB, Alpha::CPYS, 2, Result).addReg(
R31).addReg(R
31);
+ BuildMI(BB, Alpha::CPYS, 2, Result).addReg(
Alpha::F31).addReg(Alpha::F
31);
} else {
abort();
}