Rename MRegisterDesc -> TargetRegisterDesc for consistency

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23564 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/MRegisterInfo.h b/include/llvm/Target/MRegisterInfo.h
index 716db0398c5626794d79400a75a87a2904a60999..09fdcbec101713fe0876582daf721e2048d3322c 100644 (file)
--- a/include/llvm/Target/MRegisterInfo.h
+++ b/include/llvm/Target/MRegisterInfo.h
@@ -27,13 +27,13 @@ class MachineFunction;
 class MachineInstr;
 class TargetRegisterClass;
 
-/// MRegisterDesc - This record contains all of the information known about a
-/// particular register.  The AliasSet field (if not null) contains a pointer to
-/// a Zero terminated array of registers that this register aliases.  This is
+/// TargetRegisterDesc - This record contains all of the information known about
+/// a particular register.  The AliasSet field (if not null) contains a pointer
+/// to a Zero terminated array of registers that this register aliases.  This is
 /// needed for architectures like X86 which have AL alias AX alias EAX.
 /// Registers that this does not apply to simply should set this to null.
 ///
-struct MRegisterDesc {
+struct TargetRegisterDesc {
   const char     *Name;         // Assembly language name for the register
   const unsigned *AliasSet;     // Register Alias Set, described above
 };
@@ -105,22 +105,22 @@ public:
 
 
 /// MRegisterInfo base class - We assume that the target defines a static array
-/// of MRegisterDesc objects that represent all of the machine registers that
-/// the target has.  As such, we simply have to track a pointer to this array so
-/// that we can turn register number into a register descriptor.
+/// of TargetRegisterDesc objects that represent all of the machine registers
+/// that the target has.  As such, we simply have to track a pointer to this
+/// array so that we can turn register number into a register descriptor.
 ///
 class MRegisterInfo {
 public:
   typedef const TargetRegisterClass * const * regclass_iterator;
 private:
-  const MRegisterDesc *Desc;                  // Pointer to the descriptor array
+  const TargetRegisterDesc *Desc;             // Pointer to the descriptor array
   unsigned NumRegs;                           // Number of entries in the array
 
   regclass_iterator RegClassBegin, RegClassEnd;   // List of regclasses
 
   int CallFrameSetupOpcode, CallFrameDestroyOpcode;
 protected:
-  MRegisterInfo(const MRegisterDesc *D, unsigned NR,
+  MRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
                 regclass_iterator RegClassBegin, regclass_iterator RegClassEnd,
                 int CallFrameSetupOpcode = -1, int CallFrameDestroyOpcode = -1);
   virtual ~MRegisterInfo();
@@ -162,7 +162,7 @@ public:
   /// indicating if a register is allocatable or not.
   std::vector<bool> getAllocatableSet(MachineFunction &MF) const;
 
-  const MRegisterDesc &operator[](unsigned RegNo) const {
+  const TargetRegisterDesc &operator[](unsigned RegNo) const {
     assert(RegNo < NumRegs &&
            "Attempting to access record for invalid register number!");
     return Desc[RegNo];
@@ -171,7 +171,9 @@ public:
   /// Provide a get method, equivalent to [], but more useful if we have a
   /// pointer to this object.
   ///
-  const MRegisterDesc &get(unsigned RegNo) const { return operator[](RegNo); }
+  const TargetRegisterDesc &get(unsigned RegNo) const {
+    return operator[](RegNo);
+  }
 
   /// getAliasSet - Return the set of registers aliased by the specified
   /// register, or a null list of there are none.  The list returned is zero

diff --git a/lib/Target/MRegisterInfo.cpp b/lib/Target/MRegisterInfo.cpp
index 3ab7d991c8650bc333ed15bf91190843b8c7a289..c8eba554dbca7923fda5ab68522d27739b12872d 100644 (file)
--- a/lib/Target/MRegisterInfo.cpp
+++ b/lib/Target/MRegisterInfo.cpp
@@ -15,7 +15,7 @@
 
 namespace llvm {
 
-MRegisterInfo::MRegisterInfo(const MRegisterDesc *D, unsigned NR,
+MRegisterInfo::MRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
                              regclass_iterator RCB, regclass_iterator RCE,
                              int CFSO, int CFDO)
   : Desc(D), NumRegs(NR), RegClassBegin(RCB), RegClassEnd(RCE) {

diff --git a/lib/Target/SparcV9/SparcV9RegisterInfo.cpp b/lib/Target/SparcV9/SparcV9RegisterInfo.cpp
index 70b5fd5e137a396dc1688b519354932595ef888d..6149ad6262480e37ef46f0980120bd0a16afc61a 100644 (file)
--- a/lib/Target/SparcV9/SparcV9RegisterInfo.cpp
+++ b/lib/Target/SparcV9/SparcV9RegisterInfo.cpp
@@ -128,7 +128,7 @@ namespace {
   const unsigned icc_AliasSet[] = { SparcV9::ccr, 0 };
   const unsigned ccr_AliasSet[] = { SparcV9::xcc, SparcV9::icc, 0 };
 
-const MRegisterDesc RegisterDescriptors[] = { // Descriptors
+const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors
   { "o0", Empty_AliasSet },
   { "o1", Empty_AliasSet },
   { "o2", Empty_AliasSet },

diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index c3022ae57073de1b6e3565fab11bd3ae809b0099..c16fa2dbe1d2e7d2c2c73ebf95fe35130d345898 100644 (file)
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -198,7 +198,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) {
     OS << "0 };\n";
   }
 
-  OS << "\n  const MRegisterDesc RegisterDescriptors[] = { // Descriptors\n";
+  OS<<"\n  const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors\n";
   OS << "    { \"NOREG\",\t0 },\n";