|| getDescriptor(opCode).iclass & M_PREFETCH_FLAG
|| getDescriptor(opCode).iclass & M_STORE_FLAG;
}
- bool isDummyPhiInstr(MachineOpCode opCode) const {
+ bool isDummyPhiInstr(const MachineOpCode opCode) const {
return getDescriptor(opCode).iclass & M_DUMMY_PHI_FLAG;
}
// delete this later *******
- bool isPhi(MachineOpCode opCode) { return isDummyPhiInstr(opCode); }
+ bool isPhi(const MachineOpCode opCode) { return isDummyPhiInstr(opCode); }
// Check if an instruction can be issued before its operands are ready,
|| getDescriptor(opCode).iclass & M_PREFETCH_FLAG
|| getDescriptor(opCode).iclass & M_STORE_FLAG;
}
- bool isDummyPhiInstr(MachineOpCode opCode) const {
+ bool isDummyPhiInstr(const MachineOpCode opCode) const {
return getDescriptor(opCode).iclass & M_DUMMY_PHI_FLAG;
}
// delete this later *******
- bool isPhi(MachineOpCode opCode) { return isDummyPhiInstr(opCode); }
+ bool isPhi(const MachineOpCode opCode) { return isDummyPhiInstr(opCode); }
// Check if an instruction can be issued before its operands are ready,
cpReg2RegMI(const unsigned SrcReg, const unsigned DestReg,
const int RegType) const=0;
- virtual MachineInstr *
- cpReg2MemMI(const unsigned SrcReg, const unsigned DestPtrReg,
+ virtual MachineInstr *
+ cpReg2MemMI(const unsigned SrcReg, const unsigned DestPtrReg,
const int Offset, const int RegType) const=0;
- virtual MachineInstr *
+ virtual MachineInstr *
cpMem2RegMI(const unsigned SrcPtrReg, const int Offset,
const unsigned DestReg, const int RegType) const=0;
+ virtual MachineInstr *cpValue2Value( Value *Src, Value *Dest) const=0;
+
+
virtual bool isRegVolatile(const int RegClassID, const int Reg) const=0;