Make sure we use the correct register class here since we'll need to

care about spill values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134122 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp
index 54433a4c36f5a1c86ffa7d98239352487e09454c..daf95551896566a6be9c38950ff019f7a1f00ca4 100644 (file)
--- a/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -835,7 +835,8 @@ getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const
     case 'r':
       return std::make_pair(0U, Alpha::GPRCRegisterClass);
     case 'f':
-      return std::make_pair(0U, Alpha::F4RCRegisterClass);
+      return VT == MVT::f64 ? std::make_pair(0U, Alpha::F8RCRegisterClass) :
+       std::make_pair(0U, Alpha::F4RCRegisterClass);
     }
   }
   return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);