Moves now select correct opcode based on the data size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4981 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index a1ed317bd681cee49e4e54bd2352f3381917e029..cd22d88efbd6acdab4f33e94cbcd8409cb985838 100644 (file)
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -23,7 +23,6 @@ X86RegisterInfo::X86RegisterInfo()
   : MRegisterInfo(X86Regs, sizeof(X86Regs)/sizeof(X86Regs[0])) {
 }
 
-
 MachineBasicBlock::iterator
 X86RegisterInfo::storeReg2RegOffset(MachineBasicBlock *MBB,
                                     MachineBasicBlock::iterator MBBI,
@@ -31,7 +30,15 @@ X86RegisterInfo::storeReg2RegOffset(MachineBasicBlock *MBB,
                                     unsigned ImmOffset, unsigned dataSize)
   const
 {
-  MachineInstr *MI = addRegOffset(BuildMI(X86::MOVrm32, 5),
+  unsigned opcode;
+  switch (dataSize) {
+  case 1: opcode = X86::MOVrm8; break;
+  case 2: opcode = X86::MOVrm16; break;
+  case 4: opcode = X86::MOVrm32; break;
+  default: assert(0 && "Invalid data size!");
+  }
+
+  MachineInstr *MI = addRegOffset(BuildMI(opcode, 5),
                                   DestReg, ImmOffset).addReg(SrcReg);
   return ++(MBB->insert(MBBI, MI));
 }
@@ -43,7 +50,15 @@ X86RegisterInfo::loadRegOffset2Reg(MachineBasicBlock *MBB,
                                    unsigned ImmOffset, unsigned dataSize)
   const
 {
-  MachineInstr *MI = addRegOffset(BuildMI(X86::MOVmr32, 5).addReg(DestReg),
+  unsigned opcode;
+  switch (dataSize) {
+  case 1: opcode = X86::MOVmr8; break;
+  case 2: opcode = X86::MOVmr16; break;
+  case 4: opcode = X86::MOVmr32; break;
+  default: assert(0 && "Invalid data size!");
+  }
+
+  MachineInstr *MI = addRegOffset(BuildMI(opcode, 5).addReg(DestReg),
                                   SrcReg, ImmOffset);
   return ++(MBB->insert(MBBI, MI));
 }