Use the correct register class for Cell varargs spilling. This fixes all of the
authorCameron Zwarich <zwarich@apple.com>
Thu, 19 May 2011 04:44:19 +0000 (04:44 +0000)
committerCameron Zwarich <zwarich@apple.com>
Thu, 19 May 2011 04:44:19 +0000 (04:44 +0000)
verifier failures in the CodeGen/CellSPU tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131631 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/CellSPU/SPUISelLowering.cpp

index 4819d72d9b4668ba5f4edfbf95577b6c389499fa..d1cf50c67ba2473eeadcba2832f72b525ffa0a40 100644 (file)
@@ -1215,7 +1215,7 @@ SPUTargetLowering::LowerFormalArguments(SDValue Chain,
       FuncInfo->setVarArgsFrameIndex(
         MFI->CreateFixedObject(StackSlotSize, ArgOffset, true));
       SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
-      unsigned VReg = MF.addLiveIn(ArgRegs[ArgRegIdx], &SPU::R32CRegClass);
+      unsigned VReg = MF.addLiveIn(ArgRegs[ArgRegIdx], &SPU::VECREGRegClass);
       SDValue ArgVal = DAG.getRegister(VReg, MVT::v16i8);
       SDValue Store = DAG.getStore(Chain, dl, ArgVal, FIN, MachinePointerInfo(),
                                    false, false, 0);