Recognize target instruction flag 'isReMaterializable'.
authorEvan Cheng <evan.cheng@apple.com>
Mon, 19 Mar 2007 06:20:37 +0000 (06:20 +0000)
committerEvan Cheng <evan.cheng@apple.com>
Mon, 19 Mar 2007 06:20:37 +0000 (06:20 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35159 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/CodeGenInstruction.h
utils/TableGen/CodeGenTarget.cpp
utils/TableGen/InstrInfoEmitter.cpp

index e0d6b9837e4d8b7bf484aea88b6c97446655fb44..9a29958f78e7597d4ed089a7ba7fa3b810ada664 100644 (file)
@@ -91,6 +91,7 @@ namespace llvm {
     bool isConvertibleToThreeAddress;
     bool isCommutable;
     bool isTerminator;
+    bool isReMaterializable;
     bool hasDelaySlot;
     bool usesCustomDAGSchedInserter;
     bool hasVariableNumberOfOperands;
index d29ce514bedb0933368e1e28333ad4dfc7135576..a261871861d3b5b7549f7d76944b420c22e2a172 100644 (file)
@@ -356,6 +356,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
   isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress");
   isCommutable = R->getValueAsBit("isCommutable");
   isTerminator = R->getValueAsBit("isTerminator");
+  isReMaterializable = R->getValueAsBit("isReMaterializable");
   hasDelaySlot = R->getValueAsBit("hasDelaySlot");
   usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter");
   hasCtrlDep   = R->getValueAsBit("hasCtrlDep");
index 7ea85980da90d0f579666d0a50282521100e96ee..6fc6d0f6841256c50360899f1d90d6b50a36e22e 100644 (file)
@@ -240,6 +240,7 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
   if (Inst.isConvertibleToThreeAddress) OS << "|M_CONVERTIBLE_TO_3_ADDR";
   if (Inst.isCommutable) OS << "|M_COMMUTABLE";
   if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG";
+  if (Inst.isReMaterializable) OS << "|M_REMATERIALIZIBLE";
   if (Inst.usesCustomDAGSchedInserter)
     OS << "|M_USES_CUSTOM_DAG_SCHED_INSERTION";
   if (Inst.hasVariableNumberOfOperands)