fix warning in -asserts build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67736 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 6647d79c2da195c1282b5ebdc342a32aa969b716..657fc29bc6f79d878877377b94dd09e2c7dd4665 100644 (file)
--- a/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -1388,8 +1388,7 @@ void PPCRegisterInfo::emitEpilogue(MachineFunction &MF,
       addGlobalAddress(JumpTarget.getGlobal(), JumpTarget.getOffset());
   } else if (RetOpcode == PPC::TCRETURNri) {
     MBBI = prior(MBB.end());
-    MachineOperand &JumpTarget = MBBI->getOperand(0);
-    assert(JumpTarget.isReg() && "Expecting register operand.");
+    assert(MBBI->getOperand(0).isReg() && "Expecting register operand.");
     BuildMI(MBB, MBBI, dl, TII.get(PPC::TAILBCTR));
   } else if (RetOpcode == PPC::TCRETURNai) {
     MBBI = prior(MBB.end());
@@ -1402,8 +1401,7 @@ void PPCRegisterInfo::emitEpilogue(MachineFunction &MF,
       addGlobalAddress(JumpTarget.getGlobal(), JumpTarget.getOffset());
   } else if (RetOpcode == PPC::TCRETURNri8) {
     MBBI = prior(MBB.end());
-    MachineOperand &JumpTarget = MBBI->getOperand(0);
-    assert(JumpTarget.isReg() && "Expecting register operand.");
+    assert(MBBI->getOperand(0).isReg() && "Expecting register operand.");
     BuildMI(MBB, MBBI, dl, TII.get(PPC::TAILBCTR8));
   } else if (RetOpcode == PPC::TCRETURNai8) {
     MBBI = prior(MBB.end());