LR097:update board.c from board.xxx.tb.c

diff --git a/arch/arm/mach-rk30/board-rk3168-LR097.c b/arch/arm/mach-rk30/board-rk3168-LR097.c
index 44d2159aa991b6b244425d8bb847db8af037194b..83f6b1b278f1178e28905bd17334d445a8762b64 100755 (executable)
--- a/arch/arm/mach-rk30/board-rk3168-LR097.c
+++ b/arch/arm/mach-rk30/board-rk3168-LR097.c
@@ -236,6 +236,7 @@ static int rk29_backlight_pwm_resume(void)
 
 static struct rk29_bl_info rk29_bl_info = {
        .pwm_id = PWM_ID,
+       .min_brightness = 50,
        .bl_ref = PWM_EFFECT_VALUE,
        .io_init = rk29_backlight_io_init,
        .io_deinit = rk29_backlight_io_deinit,
@@ -2168,40 +2169,48 @@ static void __init rk30_reserve(void)
  * @logic_volt : logic voltage arm requests depend on frequency
  * comments    : min arm/logic voltage
  */
-static struct dvfs_arm_table dvfs_cpu_logic_table[] = {
-       {.frequency = 312 * 1000,       .cpu_volt = 850 * 1000,         .logic_volt = 1000 * 1000},
-       {.frequency = 504 * 1000,       .cpu_volt = 900 * 1000,         .logic_volt = 1000 * 1000},
-       {.frequency = 816 * 1000,       .cpu_volt = 950 * 1000,         .logic_volt = 1000 * 1000},
-       {.frequency = 1008 * 1000,      .cpu_volt = 1025 * 1000,        .logic_volt = 1000 * 1000},
-       {.frequency = 1200 * 1000,      .cpu_volt = 1100 * 1000,        .logic_volt = 1050 * 1000},
-       {.frequency = 1416 * 1000,      .cpu_volt = 1200 * 1000,        .logic_volt = 1150 * 1000},
-       {.frequency = 1608 * 1000,      .cpu_volt = 1300 * 1000,        .logic_volt = 1250 * 1000},
-       {.frequency = CPUFREQ_TABLE_END},
+static struct cpufreq_frequency_table dvfs_arm_table[] = {
+        {.frequency = 312 * 1000,       .index = 850 * 1000},
+        {.frequency = 504 * 1000,       .index = 900 * 1000},
+        {.frequency = 816 * 1000,       .index = 950 * 1000},
+        {.frequency = 1008 * 1000,      .index = 1025 * 1000},
+        {.frequency = 1200 * 1000,      .index = 1100 * 1000},
+        {.frequency = 1416 * 1000,      .index = 1200 * 1000},
+        {.frequency = 1608 * 1000,      .index = 1300 * 1000},
+        {.frequency = CPUFREQ_TABLE_END},
 };
 
-static struct cpufreq_frequency_table dvfs_gpu_table[] = {
-       {.frequency = 100 * 1000,       .index = 900 * 1000},
-       {.frequency = 200 * 1000,       .index = 900 * 1000},
-       {.frequency = 266 * 1000,       .index = 900 * 1000},
-       {.frequency = 300 * 1000,       .index = 900 * 1000},
-       {.frequency = 400 * 1000,       .index = 950 * 1000},
-       {.frequency = 600 * 1000,       .index = 1100 * 1000},
-       {.frequency = CPUFREQ_TABLE_END},
+static struct cpufreq_frequency_table dvfs_gpu_table[] = {     
+#if defined(CONFIG_ARCH_RK3188)
+        {.frequency = 133 * 1000,       .index = 975 * 1000},//the mininum rate is limited 133M for rk3188
+#elif defined(CONFIG_ARCH_RK3066B)
+       {.frequency = 100 * 1000,       .index = 950 * 1000},//the minimum rate is no limit for rk3168 rk3066B
+#endif
+
+       {.frequency = 200 * 1000,       .index = 975 * 1000},
+       {.frequency = 266 * 1000,       .index = 1000 * 1000},
+       {.frequency = 300 * 1000,       .index = 1050 * 1000},
+       {.frequency = 400 * 1000,       .index = 1100 * 1000},
+       {.frequency = 600 * 1000,       .index = 1200 * 1000},
+        {.frequency = CPUFREQ_TABLE_END},
 };
 
 static struct cpufreq_frequency_table dvfs_ddr_table[] = {
-       {.frequency = 300 * 1000,       .index = 1000 * 1000},
-       {.frequency = 400 * 1000,       .index = 1000 * 1000},
+//     {.frequency = 200 * 1000 + DDR_FREQ_SUSPEND,    .index = 950 * 1000},
+//     {.frequency = 300 * 1000 + DDR_FREQ_VIDEO,      .index = 1000 * 1000},
+       {.frequency = 396 * 1000 + DDR_FREQ_NORMAL,     .index = 1100 * 1000},
        {.frequency = CPUFREQ_TABLE_END},
 };
-#define DVFS_CPU_TABLE_SIZE    (ARRAY_SIZE(dvfs_cpu_logic_table))
-static struct cpufreq_frequency_table cpu_dvfs_table[DVFS_CPU_TABLE_SIZE];
-static struct cpufreq_frequency_table dep_cpu2core_table[DVFS_CPU_TABLE_SIZE];
+
+//#define DVFS_CPU_TABLE_SIZE  (ARRAY_SIZE(dvfs_cpu_logic_table))
+//static struct cpufreq_frequency_table cpu_dvfs_table[DVFS_CPU_TABLE_SIZE];
+//static struct cpufreq_frequency_table dep_cpu2core_table[DVFS_CPU_TABLE_SIZE];
 
 void __init board_clock_init(void)
 {
        rk30_clock_data_init(periph_pll_default, codec_pll_default, RK30_CLOCKS_DEFAULT_FLAGS);
-       dvfs_set_arm_logic_volt(dvfs_cpu_logic_table, cpu_dvfs_table, dep_cpu2core_table);
+       //dvfs_set_arm_logic_volt(dvfs_cpu_logic_table, cpu_dvfs_table, dep_cpu2core_table);    
+       dvfs_set_freq_volt_table(clk_get(NULL, "cpu"), dvfs_arm_table);
        dvfs_set_freq_volt_table(clk_get(NULL, "gpu"), dvfs_gpu_table);
        dvfs_set_freq_volt_table(clk_get(NULL, "ddr"), dvfs_ddr_table);
 }