Change-Id: I16b4f77083c05ffa71d569e378ea6e3cc9b1ee54
Signed-off-by: David Wu <david.wu@rock-chips.com>
+ vop1_pwm: voppwm@ff8f01a0 {
+ compatible = "rockchip,vop-pwm";
+ reg = <0x0 0xff8f01a0 0x0 0x10>;
+ #pwm-cells = <3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vop1_pwm_pin>;
+ clocks = <&cru SCLK_VOP1_PWM>;
+ clock-names = "pwm";
+ status = "disabled";
+ };
+
vopl_mmu: iommu@ff8f3f00 {
compatible = "rockchip,iommu";
reg = <0x0 0xff8f3f00 0x0 0x100>;
vopl_mmu: iommu@ff8f3f00 {
compatible = "rockchip,iommu";
reg = <0x0 0xff8f3f00 0x0 0x100>;
+ vop0_pwm: voppwm@ff9001a0 {
+ compatible = "rockchip,vop-pwm";
+ reg = <0x0 0xff9001a0 0x0 0x10>;
+ #pwm-cells = <3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vop0_pwm_pin>;
+ clocks = <&cru SCLK_VOP0_PWM>;
+ clock-names = "pwm";
+ status = "disabled";
+ };
+
vopb_mmu: iommu@ff903f00 {
compatible = "rockchip,iommu";
reg = <0x0 0xff903f00 0x0 0x100>;
vopb_mmu: iommu@ff903f00 {
compatible = "rockchip,iommu";
reg = <0x0 0xff903f00 0x0 0x100>;