+@ CHECK: it eq @ encoding: [0x08,0xbf]
+@ CHECK: addeq r1, r10 @ encoding: [0x51,0x44]
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+@ CHECK: addseq.w r1, r1, r10 @ encoding: [0x11,0xeb,0x0a,0x01]
+
+@------------------------------------------------------------------------------
+@ ADD (SP plus immediate) A8.8.9
+@------------------------------------------------------------------------------
+ it eq
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+ addeq r7, sp, #1020 // T1
+@ CHECK: addeq r7, sp, #1020 @ encoding: [0xff,0xaf]
+
+ it eq
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+ addeq sp, sp, #508 // T2
+@ FIXME: ARMARM says 'addeq sp, sp, #508'
+@ CHECK: addeq sp, #508 @ encoding: [0x7f,0xb0]
+
+ add r7, sp, #15 // T3
+@ CHECK: add.w r7, sp, #15 @ encoding: [0x0d,0xf1,0x0f,0x07]
+ adds r7, sp, #16 // T3
+@ CHECK: adds.w r7, sp, #16 @ encoding: [0x1d,0xf1,0x10,0x07]
+ add r8, sp, #16 // T3
+@ CHECK: add.w r8, sp, #16 @ encoding: [0x0d,0xf1,0x10,0x08]
+
+ addw r6, sp, #1020 // T4
+@ CHECK: addw r6, sp, #1020 @ encoding: [0x0d,0xf2,0xfc,0x36]
+ add r6, sp, #1019 // T4
+@ CHECK: addw r6, sp, #1019 @ encoding: [0x0d,0xf2,0xfb,0x36]
+
+@------------------------------------------------------------------------------
+@ ADD (SP plus register) A8.8.10
+@------------------------------------------------------------------------------
+ it eq
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+ addeq r8, sp, r8 // T1
+@ CHECK: addeq r8, sp, r8 @ encoding: [0xe8,0x44]
+ it eq
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+ addeq r8, sp // T1
+@ CHECK: addeq r8, sp @ encoding: [0xe8,0x44]
+
+ it eq
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+ addeq sp, r9 // T2
+@ CHECK: addeq sp, r9 @ encoding: [0xcd,0x44]
+
+ add r2, sp, ip // T3
+@ CHECK: add.w r2, sp, r12 @ encoding: [0x0d,0xeb,0x0c,0x02]
+ it eq
+@ CHECK: it eq @ encoding: [0x08,0xbf]
+ addeq r2, sp, ip // T3
+@ CHECK: addeq.w r2, sp, r12 @ encoding: [0x0d,0xeb,0x0c,0x02]