Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
#define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0)
#endif
#define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0)
#endif
+#ifdef CONFIG_CPU_HAS_LLSC
+#define __clear_software_ll_bit() do { } while (0)
+#else
+extern unsigned long ll_bit;
+
+#define __clear_software_ll_bit() \
+do { \
+ ll_bit = 0; \
+} while (0)
+#endif
+
#define switch_to(prev, next, last) \
do { \
__mips_mt_fpaff_switch_to(prev); \
if (cpu_has_dsp) \
__save_dsp(prev); \
#define switch_to(prev, next, last) \
do { \
__mips_mt_fpaff_switch_to(prev); \
if (cpu_has_dsp) \
__save_dsp(prev); \
+ __clear_software_ll_bit(); \
(last) = resume(prev, next, task_thread_info(next)); \
} while (0)
(last) = resume(prev, next, task_thread_info(next)); \
} while (0)
.align 7
LEAF(resume)
.set arch=octeon
.align 7
LEAF(resume)
.set arch=octeon
-#ifndef CONFIG_CPU_HAS_LLSC
- sw zero, ll_bit
-#endif
mfc0 t1, CP0_STATUS
LONG_S t1, THREAD_STATUS(a0)
cpu_save_nonscratch a0
mfc0 t1, CP0_STATUS
LONG_S t1, THREAD_STATUS(a0)
cpu_save_nonscratch a0
* struct thread_info *next_ti) )
*/
LEAF(resume)
* struct thread_info *next_ti) )
*/
LEAF(resume)
-#ifndef CONFIG_CPU_HAS_LLSC
- sw zero, ll_bit
-#endif
mfc0 t1, CP0_STATUS
sw t1, THREAD_STATUS(a0)
cpu_save_nonscratch a0
mfc0 t1, CP0_STATUS
sw t1, THREAD_STATUS(a0)
cpu_save_nonscratch a0
-#ifndef CONFIG_CPU_HAS_LLSC
- sw zero, ll_bit
-#endif
mfc0 t1, CP0_STATUS
LONG_S t1, THREAD_STATUS(a0)
cpu_save_nonscratch a0
mfc0 t1, CP0_STATUS
LONG_S t1, THREAD_STATUS(a0)
cpu_save_nonscratch a0