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The ELF ABI specifies F1-F8 registers as argument registers for double, not
author
Nicolas Geoffray
<nicolas.geoffray@lip6.fr>
Tue, 3 Apr 2007 10:27:07 +0000
(10:27 +0000)
committer
Nicolas Geoffray
<nicolas.geoffray@lip6.fr>
Tue, 3 Apr 2007 10:27:07 +0000
(10:27 +0000)
F1-F10. This affects only ELF, not MachO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35622
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/PowerPC/PPCCallingConv.td
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|
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|
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lib/Target/PowerPC/PPCISelLowering.cpp
patch
|
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lib/Target/PowerPC/PPCInstr64Bit.td
patch
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|
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lib/Target/PowerPC/PPCInstrInfo.td
patch
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lib/Target/PowerPC/PPCRegisterInfo.cpp
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diff --git
a/lib/Target/PowerPC/PPCCallingConv.td
b/lib/Target/PowerPC/PPCCallingConv.td
index 2b69d46bab617b043560e40feb1ff0c507c10cb4..b75ec40f6f45ee7514c9c0363b00e8549e84d7b5 100644
(file)
--- a/
lib/Target/PowerPC/PPCCallingConv.td
+++ b/
lib/Target/PowerPC/PPCCallingConv.td
@@
-44,8
+44,8
@@
def CC_PPC : CallingConv<[
// Darwin passes FP values in F1 - F13
CCIfType<[f32, f64], CCIfSubtarget<"isMachoABI()",
CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8,F9,F10,F11,F12,F13]>>>,
// Darwin passes FP values in F1 - F13
CCIfType<[f32, f64], CCIfSubtarget<"isMachoABI()",
CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8,F9,F10,F11,F12,F13]>>>,
- // Other sub-targets pass FP values in F1-
10
.
- CCIfType<[f32, f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8
, F9,F10
]>>,
+ // Other sub-targets pass FP values in F1-
F8
.
+ CCIfType<[f32, f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>,
// The first 12 Vector arguments are passed in altivec registers.
CCIfType<[v16i8, v8i16, v4i32, v4f32],
// The first 12 Vector arguments are passed in altivec registers.
CCIfType<[v16i8, v8i16, v4i32, v4f32],
diff --git
a/lib/Target/PowerPC/PPCISelLowering.cpp
b/lib/Target/PowerPC/PPCISelLowering.cpp
index 4b29bc78862e8e4750b6185ede7050c00fc2636d..5ac87104f99a9b5ee6c16e9847de47842d50686e 100644
(file)
--- a/
lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/
lib/Target/PowerPC/PPCISelLowering.cpp
@@
-1113,7
+1113,7
@@
static const unsigned *GetFPR(const PPCSubtarget &Subtarget) {
static const unsigned FPR[] = {
PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7,
static const unsigned FPR[] = {
PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7,
- PPC::F8
, PPC::F9, PPC::F10
+ PPC::F8
};
return FPR;
}
};
return FPR;
}
@@
-1154,7
+1154,7
@@
static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG,
};
const unsigned Num_GPR_Regs = sizeof(GPR_32)/sizeof(GPR_32[0]);
};
const unsigned Num_GPR_Regs = sizeof(GPR_32)/sizeof(GPR_32[0]);
- const unsigned Num_FPR_Regs = isMachoABI ? 13 :
10
;
+ const unsigned Num_FPR_Regs = isMachoABI ? 13 :
8
;
const unsigned Num_VR_Regs = sizeof( VR)/sizeof( VR[0]);
unsigned GPR_idx = 0, FPR_idx = 0, VR_idx = 0;
const unsigned Num_VR_Regs = sizeof( VR)/sizeof( VR[0]);
unsigned GPR_idx = 0, FPR_idx = 0, VR_idx = 0;
@@
-1410,7
+1410,7
@@
static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG,
PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
};
const unsigned NumGPRs = sizeof(GPR_32)/sizeof(GPR_32[0]);
PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
};
const unsigned NumGPRs = sizeof(GPR_32)/sizeof(GPR_32[0]);
- const unsigned NumFPRs = isMachoABI ? 13 :
10
;
+ const unsigned NumFPRs = isMachoABI ? 13 :
8
;
const unsigned NumVRs = sizeof( VR)/sizeof( VR[0]);
const unsigned *GPR = isPPC64 ? GPR_64 : GPR_32;
const unsigned NumVRs = sizeof( VR)/sizeof( VR[0]);
const unsigned *GPR = isPPC64 ? GPR_64 : GPR_32;
diff --git
a/lib/Target/PowerPC/PPCInstr64Bit.td
b/lib/Target/PowerPC/PPCInstr64Bit.td
index 56070b2b3f6637b0007edde72b5cd8dd9621914e..e6ede49fbeeb9239679d3a1627bdac727f330a03 100644
(file)
--- a/
lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/
lib/Target/PowerPC/PPCInstr64Bit.td
@@
-91,7
+91,7
@@
let isCall = 1, noResults = 1, PPC970_Unit = 7,
let isCall = 1, noResults = 1, PPC970_Unit = 7,
// All calls clobber the PPC64 non-callee saved registers.
Defs = [X0,X2,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,
let isCall = 1, noResults = 1, PPC970_Unit = 7,
// All calls clobber the PPC64 non-callee saved registers.
Defs = [X0,X2,X3,X4,X5,X6,X7,X8,X9,X10,X11,X12,
- F0,F1,F2,F3,F4,F5,F6,F7,F8,
F9,F10,
+ F0,F1,F2,F3,F4,F5,F6,F7,F8,
V0,V1,V2,V3,V4,V5,V6,V7,V8,V9,V10,V11,V12,V13,V14,V15,V16,V17,V18,V19,
LR8,CTR8,
CR0,CR1,CR5,CR6,CR7] in {
V0,V1,V2,V3,V4,V5,V6,V7,V8,V9,V10,V11,V12,V13,V14,V15,V16,V17,V18,V19,
LR8,CTR8,
CR0,CR1,CR5,CR6,CR7] in {
diff --git
a/lib/Target/PowerPC/PPCInstrInfo.td
b/lib/Target/PowerPC/PPCInstrInfo.td
index cfdb3780acce160cda01061bc0b9472fea880d92..e43b33921b7edcb081317515bc18a94f3578cc94 100644
(file)
--- a/
lib/Target/PowerPC/PPCInstrInfo.td
+++ b/
lib/Target/PowerPC/PPCInstrInfo.td
@@
-396,7
+396,7
@@
let isCall = 1, noResults = 1, PPC970_Unit = 7,
let isCall = 1, noResults = 1, PPC970_Unit = 7,
// All calls clobber the non-callee saved registers...
Defs = [R0,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,
let isCall = 1, noResults = 1, PPC970_Unit = 7,
// All calls clobber the non-callee saved registers...
Defs = [R0,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,
- F0,F1,F2,F3,F4,F5,F6,F7,F8,
F9,F10,
+ F0,F1,F2,F3,F4,F5,F6,F7,F8,
V0,V1,V2,V3,V4,V5,V6,V7,V8,V9,V10,V11,V12,V13,V14,V15,V16,V17,V18,V19,
LR,CTR,
CR0,CR1,CR5,CR6,CR7] in {
V0,V1,V2,V3,V4,V5,V6,V7,V8,V9,V10,V11,V12,V13,V14,V15,V16,V17,V18,V19,
LR,CTR,
CR0,CR1,CR5,CR6,CR7] in {
diff --git
a/lib/Target/PowerPC/PPCRegisterInfo.cpp
b/lib/Target/PowerPC/PPCRegisterInfo.cpp
index a2ee9199462a76b5d589fc30f7c07fc3202dd564..6bd2716011786475995f4ebae9452d029df244ba 100644
(file)
--- a/
lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/
lib/Target/PowerPC/PPCRegisterInfo.cpp
@@
-278,7
+278,8
@@
const unsigned* PPCRegisterInfo::getCalleeSavedRegs() const {
PPC::R24, PPC::R25, PPC::R26, PPC::R27,
PPC::R28, PPC::R29, PPC::R30, PPC::R31,
PPC::R24, PPC::R25, PPC::R26, PPC::R27,
PPC::R28, PPC::R29, PPC::R30, PPC::R31,
- PPC::F11, PPC::F12, PPC::F13,
+ PPC::F9,
+ PPC::F10, PPC::F11, PPC::F12, PPC::F13,
PPC::F14, PPC::F15, PPC::F16, PPC::F17,
PPC::F18, PPC::F19, PPC::F20, PPC::F21,
PPC::F22, PPC::F23, PPC::F24, PPC::F25,
PPC::F14, PPC::F15, PPC::F16, PPC::F17,
PPC::F18, PPC::F19, PPC::F20, PPC::F21,
PPC::F22, PPC::F23, PPC::F24, PPC::F25,
@@
-320,8
+321,9
@@
const unsigned* PPCRegisterInfo::getCalleeSavedRegs() const {
PPC::X20, PPC::X21, PPC::X22, PPC::X23,
PPC::X24, PPC::X25, PPC::X26, PPC::X27,
PPC::X28, PPC::X29, PPC::X30, PPC::X31,
PPC::X20, PPC::X21, PPC::X22, PPC::X23,
PPC::X24, PPC::X25, PPC::X26, PPC::X27,
PPC::X28, PPC::X29, PPC::X30, PPC::X31,
-
- PPC::F11, PPC::F12, PPC::F13,
+
+ PPC::F9,
+ PPC::F10, PPC::F11, PPC::F12, PPC::F13,
PPC::F14, PPC::F15, PPC::F16, PPC::F17,
PPC::F18, PPC::F19, PPC::F20, PPC::F21,
PPC::F22, PPC::F23, PPC::F24, PPC::F25,
PPC::F14, PPC::F15, PPC::F16, PPC::F17,
PPC::F18, PPC::F19, PPC::F20, PPC::F21,
PPC::F22, PPC::F23, PPC::F24, PPC::F25,