NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225731
91177308-0d34-0410-b5e6-
96231b3b80d8
virtual ~AsmPrinter();
DwarfDebug *getDwarfDebug() { return DD; }
virtual ~AsmPrinter();
DwarfDebug *getDwarfDebug() { return DD; }
+ DwarfDebug *getDwarfDebug() const { return DD; }
/// Return true if assembly output should contain comments.
///
/// Return true if assembly output should contain comments.
///
ByteStreamer &BS;
public:
ByteStreamer &BS;
public:
- DebugLocDwarfExpression(TargetMachine &TM, ByteStreamer &BS)
- : DwarfExpression(TM), BS(BS) {}
+ DebugLocDwarfExpression(const AsmPrinter &AP, ByteStreamer &BS)
+ : DwarfExpression(AP), BS(BS) {}
void EmitOp(uint8_t Op, const char *Comment) override;
void EmitSigned(int Value) override;
void EmitOp(uint8_t Op, const char *Comment) override;
void EmitSigned(int Value) override;
unsigned PieceSizeInBits,
unsigned PieceOffsetInBits) const {
assert(MLoc.isReg() && "MLoc must be a register");
unsigned PieceSizeInBits,
unsigned PieceOffsetInBits) const {
assert(MLoc.isReg() && "MLoc must be a register");
- DebugLocDwarfExpression Expr(TM, Streamer);
+ DebugLocDwarfExpression Expr(*this, Streamer);
Expr.AddMachineRegPiece(MLoc.getReg(), PieceSizeInBits, PieceOffsetInBits);
}
void AsmPrinter::EmitDwarfOpPiece(ByteStreamer &Streamer,
unsigned PieceSizeInBits,
unsigned PieceOffsetInBits) const {
Expr.AddMachineRegPiece(MLoc.getReg(), PieceSizeInBits, PieceOffsetInBits);
}
void AsmPrinter::EmitDwarfOpPiece(ByteStreamer &Streamer,
unsigned PieceSizeInBits,
unsigned PieceOffsetInBits) const {
- DebugLocDwarfExpression Expr(TM, Streamer);
+ DebugLocDwarfExpression Expr(*this, Streamer);
Expr.AddOpPiece(PieceSizeInBits, PieceOffsetInBits);
}
Expr.AddOpPiece(PieceSizeInBits, PieceOffsetInBits);
}
void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
const MachineLocation &MLoc,
bool Indirect) const {
void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
const MachineLocation &MLoc,
bool Indirect) const {
- DebugLocDwarfExpression Expr(TM, Streamer);
+ DebugLocDwarfExpression Expr(*this, Streamer);
const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false);
if (Reg < 0) {
const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false);
if (Reg < 0) {
//===----------------------------------------------------------------------===//
#include "DwarfExpression.h"
//===----------------------------------------------------------------------===//
#include "DwarfExpression.h"
+
+#include "DwarfDebug.h"
#include "llvm/ADT/SmallBitVector.h"
#include "llvm/ADT/SmallBitVector.h"
+#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/Support/Dwarf.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Support/Dwarf.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
+const TargetRegisterInfo *DwarfExpression::getTRI() const {
+ return AP.TM.getSubtargetImpl()->getRegisterInfo();
+}
+
void DwarfExpression::AddReg(int DwarfReg, const char* Comment) {
assert(DwarfReg >= 0 && "invalid negative dwarf register number");
if (DwarfReg < 32) {
void DwarfExpression::AddReg(int DwarfReg, const char* Comment) {
assert(DwarfReg >= 0 && "invalid negative dwarf register number");
if (DwarfReg < 32) {
}
bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {
}
bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {
- const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
- int DwarfReg = TRI->getDwarfRegNum(MachineReg, false);
+ int DwarfReg = getTRI()->getDwarfRegNum(MachineReg, false);
if (DwarfReg < 0)
return false;
if (DwarfReg < 0)
return false;
void DwarfExpression::AddMachineRegPiece(unsigned MachineReg,
unsigned PieceSizeInBits,
unsigned PieceOffsetInBits) {
void DwarfExpression::AddMachineRegPiece(unsigned MachineReg,
unsigned PieceSizeInBits,
unsigned PieceOffsetInBits) {
- const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
+ const TargetRegisterInfo *TRI = getTRI();
int Reg = TRI->getDwarfRegNum(MachineReg, false);
// If this is a valid register number, emit it.
int Reg = TRI->getDwarfRegNum(MachineReg, false);
// If this is a valid register number, emit it.
+class AsmPrinter;
+class TargetRegisterInfo;
/// Base class containing the logic for constructing DWARF expressions
/// independently of whether they are emitted into a DIE or into a .debug_loc
/// entry.
class DwarfExpression {
protected:
/// Base class containing the logic for constructing DWARF expressions
/// independently of whether they are emitted into a DIE or into a .debug_loc
/// entry.
class DwarfExpression {
protected:
+ const AsmPrinter &AP;
+ // Various convenience accessors that extract things out of AsmPrinter.
+ const TargetRegisterInfo *getTRI() const;
+
- DwarfExpression(TargetMachine &TM) : TM(TM) {}
+ DwarfExpression(const AsmPrinter &AP) : AP(AP) {}
virtual ~DwarfExpression() {}
virtual void EmitOp(uint8_t Op, const char* Comment = nullptr) = 0;
virtual ~DwarfExpression() {}
virtual void EmitOp(uint8_t Op, const char* Comment = nullptr) = 0;
DwarfUnit &DU;
DIELoc &DIE;
public:
DwarfUnit &DU;
DIELoc &DIE;
public:
- DIEDwarfExpression(TargetMachine &TM, DwarfUnit &DU, DIELoc &DIE)
- : DwarfExpression(TM), DU(DU), DIE(DIE) {}
+ DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU, DIELoc &DIE)
+ : DwarfExpression(AP), DU(DU), DIE(DIE) {}
void EmitOp(uint8_t Op, const char* Comment = nullptr) override;
void EmitSigned(int Value) override;
void EmitOp(uint8_t Op, const char* Comment = nullptr) override;
void EmitSigned(int Value) override;
DU.addUInt(DIE, dwarf::DW_FORM_udata, Value);
}
unsigned DIEDwarfExpression::getFrameRegister() {
DU.addUInt(DIE, dwarf::DW_FORM_udata, Value);
}
unsigned DIEDwarfExpression::getFrameRegister() {
- const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
- return TRI->getFrameRegister(*DU.getAsmPrinter()->MF);
+ return getTRI()->getFrameRegister(*AP.MF);
/// addRegisterOp - Add register operand.
bool DwarfUnit::addRegisterOpPiece(DIELoc &TheDie, unsigned Reg,
unsigned SizeInBits, unsigned OffsetInBits) {
/// addRegisterOp - Add register operand.
bool DwarfUnit::addRegisterOpPiece(DIELoc &TheDie, unsigned Reg,
unsigned SizeInBits, unsigned OffsetInBits) {
- DIEDwarfExpression Expr(Asm->TM, *this, TheDie);
+ DIEDwarfExpression Expr(*Asm, *this, TheDie);
Expr.AddMachineRegPiece(Reg, SizeInBits, OffsetInBits);
return true;
}
Expr.AddMachineRegPiece(Reg, SizeInBits, OffsetInBits);
return true;
}
/// addRegisterOffset - Add register offset.
bool DwarfUnit::addRegisterOffset(DIELoc &TheDie, unsigned Reg,
int64_t Offset) {
/// addRegisterOffset - Add register offset.
bool DwarfUnit::addRegisterOffset(DIELoc &TheDie, unsigned Reg,
int64_t Offset) {
- DIEDwarfExpression Expr(Asm->TM, *this, TheDie);
+ DIEDwarfExpression Expr(*Asm, *this, TheDie);
return Expr.AddMachineRegIndirect(Reg, Offset);
}
return Expr.AddMachineRegIndirect(Reg, Offset);
}