is scaled by two.
- Teach GetInstSizeInBytes about TBB and TBH.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77701
91177308-0d34-0410-b5e6-
96231b3b80d8
case ARM::BR_JTr:
case ARM::BR_JTm:
case ARM::BR_JTadd:
case ARM::BR_JTr:
case ARM::BR_JTm:
case ARM::BR_JTadd:
+ case ARM::t2BR_JT:
+ case ARM::t2TBB:
+ case ARM::t2TBH: {
// These are jumptable branches, i.e. a branch followed by an inlined
// These are jumptable branches, i.e. a branch followed by an inlined
- // jumptable. The size is 4 + 4 * number of entries.
+ // jumptable. The size is 4 + 4 * number of entries. For TBB, each
+ // entry is one byte; TBH two byte each.
+ unsigned EntrySize = (MI->getOpcode() == ARM::t2TBB)
+ ? 1 : ((MI->getOpcode() == ARM::t2TBH) ? 2 : 4);
unsigned NumOps = TID.getNumOperands();
MachineOperand JTOP =
MI->getOperand(NumOps - (TID.isPredicable() ? 3 : 2));
unsigned NumOps = TID.getNumOperands();
MachineOperand JTOP =
MI->getOperand(NumOps - (TID.isPredicable() ? 3 : 2));
// FIXME: If we know the size of the function is less than (1 << 16) *2
// bytes, we can use 16-bit entries instead. Then there won't be an
// alignment issue.
// FIXME: If we know the size of the function is less than (1 << 16) *2
// bytes, we can use 16-bit entries instead. Then there won't be an
// alignment issue.
- return getNumJTEntries(JT, JTI) * 4 + (IsThumb1JT ? 2 : 4);
+ return getNumJTEntries(JT, JTI) * EntrySize + (IsThumb1JT ? 2 : 4);
}
default:
// Otherwise, pseudo-instruction sizes are zero.
}
default:
// Otherwise, pseudo-instruction sizes are zero.
// the numbers agree with the position of the block in the function.
MF.RenumberBlocks();
// the numbers agree with the position of the block in the function.
MF.RenumberBlocks();
- // Thumb1 functions containing constant pools get 2-byte alignment.
+ // Thumb1 functions containing constant pools get 4-byte alignment.
// This is so we can keep exact track of where the alignment padding goes.
// This is so we can keep exact track of where the alignment padding goes.
- // Set default. Thumb1 function is 1-byte aligned, ARM and Thumb2 are 2-byte
+ // Set default. Thumb1 function is 2-byte aligned, ARM and Thumb2 are 4-byte
// aligned.
AFI->setAlign(isThumb1 ? 1U : 2U);
// aligned.
AFI->setAlign(isThumb1 ? 1U : 2U);
unsigned DstOffset = BBOffsets[MBB->getNumber()];
// Negative offset is not ok. FIXME: We should change BB layout to make
// sure all the branches are forward.
unsigned DstOffset = BBOffsets[MBB->getNumber()];
// Negative offset is not ok. FIXME: We should change BB layout to make
// sure all the branches are forward.
- if (ByteOk && !OffsetIsInRange(JTOffset, DstOffset, (1<<8)-1, false))
+ if (ByteOk && (DstOffset - JTOffset) > ((1<<8)-1)*2)
- if (HalfWordOk &&
- !OffsetIsInRange(JTOffset, DstOffset, (1<<16)-1, false))
+ if (HalfWordOk && (DstOffset - JTOffset) > ((1<<16)-1)*2)
HalfWordOk = false;
if (!ByteOk && !HalfWordOk)
break;
HalfWordOk = false;
if (!ByteOk && !HalfWordOk)
break;
.addReg(IdxReg, getKillRegState(IdxRegKill))
.addJumpTableIndex(JTI, JTOP.getTargetFlags())
.addImm(MI->getOperand(JTOpIdx+1).getImm()));
.addReg(IdxReg, getKillRegState(IdxRegKill))
.addJumpTableIndex(JTI, JTOP.getTargetFlags())
.addImm(MI->getOperand(JTOpIdx+1).getImm()));
+ // FIXME: Insert an "ALIGN" instruction to ensure the next instruction
+ // is 2-byte aligned. For now, asm printer will fix it up.
AddrMI->eraseFromParent();
if (LeaMI)
LeaMI->eraseFromParent();
AddrMI->eraseFromParent();
if (LeaMI)
LeaMI->eraseFromParent();