/// TargetMachine ctor - Create an ILP32 architecture model
///
ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS)
/// TargetMachine ctor - Create an ILP32 architecture model
///
ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS)
- : TargetMachine("ARM"), DataLayout("E-p:32:32"),
- FrameInfo() {
+ : DataLayout("E-p:32:32") {
}
unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
}
unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
}
AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
}
AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
- : TargetMachine("alpha"), DataLayout("e"),
FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
JITInfo(*this),
Subtarget(M, FS)
FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
JITInfo(*this),
Subtarget(M, FS)
const TargetData DataLayout; // Calculates type size & alignment
CTargetMachine(const Module &M, const std::string &FS)
const TargetData DataLayout; // Calculates type size & alignment
CTargetMachine(const Module &M, const std::string &FS)
- : TargetMachine("CBackend", M), DataLayout(&M) {}
// This is the only thing that actually does anything here.
virtual bool addPassesToEmitFile(PassManager &PM, std::ostream &Out,
// This is the only thing that actually does anything here.
virtual bool addPassesToEmitFile(PassManager &PM, std::ostream &Out,
/// IA64TargetMachine ctor - Create an LP64 architecture model
///
IA64TargetMachine::IA64TargetMachine(const Module &M, const std::string &FS)
/// IA64TargetMachine ctor - Create an LP64 architecture model
///
IA64TargetMachine::IA64TargetMachine(const Module &M, const std::string &FS)
- : TargetMachine("IA64"), DataLayout("e"),
FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
TLInfo(*this) { // FIXME? check this stuff
}
FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
TLInfo(*this) { // FIXME? check this stuff
}
PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
bool is64Bit)
PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS,
bool is64Bit)
- : TargetMachine("PowerPC"), Subtarget(M, FS, is64Bit),
+ : Subtarget(M, FS, is64Bit),
DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
FrameInfo(*this, false), JITInfo(*this, is64Bit), TLInfo(*this),
InstrItins(Subtarget.getInstrItineraryData()) {
DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
FrameInfo(*this, false), JITInfo(*this, is64Bit), TLInfo(*this),
InstrItins(Subtarget.getInstrItineraryData()) {
/// SparcTargetMachine ctor - Create an ILP32 architecture model
///
SparcTargetMachine::SparcTargetMachine(const Module &M, const std::string &FS)
/// SparcTargetMachine ctor - Create an ILP32 architecture model
///
SparcTargetMachine::SparcTargetMachine(const Module &M, const std::string &FS)
- : TargetMachine("Sparc"), DataLayout("E-p:32:32"),
+ : DataLayout("E-p:32:32"),
Subtarget(M, FS), InstrInfo(Subtarget),
FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
}
Subtarget(M, FS), InstrInfo(Subtarget),
FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
}
// TargetMachine Class
//
// TargetMachine Class
//
-TargetMachine::TargetMachine(const std::string &name, const Module &M)
- : Name(name) {
-}
-
TargetMachine::~TargetMachine() {
}
TargetMachine::~TargetMachine() {
}
/// X86TargetMachine ctor - Create an ILP32 architecture model
///
X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS)
/// X86TargetMachine ctor - Create an ILP32 architecture model
///
X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS)
- : TargetMachine("X86"),
- Subtarget(M, FS),
- DataLayout("e-p:32:32-d:32-l:32"),
+ : Subtarget(M, FS), DataLayout("e-p:32:32-d:32-l:32"),
FrameInfo(TargetFrameInfo::StackGrowsDown,
Subtarget.getStackAlignment(), -4),
InstrInfo(*this), JITInfo(*this), TLInfo(*this) {
FrameInfo(TargetFrameInfo::StackGrowsDown,
Subtarget.getStackAlignment(), -4),
InstrInfo(*this), JITInfo(*this), TLInfo(*this) {