git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138835
91177308-0d34-0410-b5e6-
96231b3b80d8
uint32_t ARMMCCodeEmitter::
getAddrModePCOpValue(const MCInst &MI, unsigned OpIdx,
SmallVectorImpl<MCFixup> &Fixups) const {
uint32_t ARMMCCodeEmitter::
getAddrModePCOpValue(const MCInst &MI, unsigned OpIdx,
SmallVectorImpl<MCFixup> &Fixups) const {
- return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_cp, Fixups);
+ const MCOperand MO = MI.getOperand(OpIdx);
+ if (MO.isExpr())
+ return ::getBranchTargetOpValue(MI, OpIdx, ARM::fixup_arm_thumb_cp, Fixups);
+ return (MO.getImm() >> 2);
}
/// getAddrMode5OpValue - Return encoding info for 'reg +/- imm10' operand.
}
/// getAddrMode5OpValue - Return encoding info for 'reg +/- imm10' operand.
@ LDR (literal)
@------------------------------------------------------------------------------
ldr r1, _foo
@ LDR (literal)
@------------------------------------------------------------------------------
ldr r1, _foo
+ ldr r3, #604
+ ldr r3, #368
@ CHECK: ldr r1, _foo @ encoding: [A,0x49]
@ fixup A - offset: 0, value: _foo, kind: fixup_arm_thumb_cp
@ CHECK: ldr r1, _foo @ encoding: [A,0x49]
@ fixup A - offset: 0, value: _foo, kind: fixup_arm_thumb_cp
+@ CHECK: ldr r3, #604 @ encoding: [0x97,0x4b]
+@ CHECK: ldr r3, #368 @ encoding: [0x5c,0x4b]
@------------------------------------------------------------------------------
@ LDR (register)
@------------------------------------------------------------------------------
@ LDR (register)