memory operands rather than immediate operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102217
91177308-0d34-0410-b5e6-
96231b3b80d8
default:
return 0;
case kOperandTypeX86Memory:
default:
return 0;
case kOperandTypeX86Memory:
+ case kOperandTypeX86PCRelative:
+ case kOperandTypeX86EffectiveAddress:
case kOperandTypeARMSoReg:
case kOperandTypeARMSoImm:
case kOperandTypeARMAddrMode2:
case kOperandTypeARMSoReg:
case kOperandTypeARMSoImm:
case kOperandTypeARMAddrMode2:
case kOperandTypeARMAddrMode5:
case kOperandTypeARMAddrMode6:
case kOperandTypeARMAddrModePC:
case kOperandTypeARMAddrMode5:
case kOperandTypeARMAddrMode6:
case kOperandTypeARMAddrModePC:
+ case kOperandTypeARMBranchTarget:
case kOperandTypeThumbAddrModeS1:
case kOperandTypeThumbAddrModeS2:
case kOperandTypeThumbAddrModeS4:
case kOperandTypeThumbAddrModeS1:
case kOperandTypeThumbAddrModeS2:
case kOperandTypeThumbAddrModeS4:
IMM("i16imm");
IMM("i16i8imm");
IMM("i32imm");
IMM("i16imm");
IMM("i16i8imm");
IMM("i32imm");
IMM("i32i8imm");
IMM("i64imm");
IMM("i64i8imm");
IMM("i64i32imm");
IMM("i32i8imm");
IMM("i64imm");
IMM("i64i8imm");
IMM("i64i32imm");
- IMM("i64i32imm_pcrel");
IMM("SSECC");
// all R, I, R, I, R
IMM("SSECC");
// all R, I, R, I, R
LEA("lea64mem");
// all I
LEA("lea64mem");
// all I
+ PCR("i32imm_pcrel");
+ PCR("i64i32imm_pcrel");
PCR("brtarget8");
PCR("offset8");
PCR("offset16");
PCR("brtarget8");
PCR("offset8");
PCR("offset16");