from the MachineInstr into the caller which is already doing a switch
over the instruction.
This will make it more clear how to compute different operands to feed
the comment selection for example.
Also, in a drive-by-fix, don't append an empty comment string (which is
a no-op ultimately).
No functionality changed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218361
91177308-0d34-0410-b5e6-
96231b3b80d8
-static std::string getShuffleComment(const MachineInstr &MI) {
+static std::string getShuffleComment(int Opcode, const MachineOperand &DstOp,
+ const MachineOperand &SrcOp,
+ const MachineOperand &MaskOp,
+ ArrayRef<MachineConstantPoolEntry> Constants) {
std::string Comment;
SmallVector<int, 16> Mask;
std::string Comment;
SmallVector<int, 16> Mask;
- // All of these instructions accept a constant pool operand as their fifth.
- assert(MI.getNumOperands() > 5 &&
- "We should always have at least 5 operands!");
- const MachineOperand &DstOp = MI.getOperand(0);
- const MachineOperand &SrcOp = MI.getOperand(1);
- const MachineOperand &MaskOp = MI.getOperand(5);
-
if (!MaskOp.isCPI())
return Comment;
if (!MaskOp.isCPI())
return Comment;
- ArrayRef<MachineConstantPoolEntry> Constants =
- MI.getParent()->getParent()->getConstantPool()->getConstants();
const MachineConstantPoolEntry &MaskConstantEntry =
Constants[MaskOp.getIndex()];
const MachineConstantPoolEntry &MaskConstantEntry =
Constants[MaskOp.getIndex()];
assert(MaskConstantEntry.getType() == C->getType() &&
"Expected a constant of the same type!");
assert(MaskConstantEntry.getType() == C->getType() &&
"Expected a constant of the same type!");
- switch (MI.getOpcode()) {
case X86::PSHUFBrm:
case X86::VPSHUFBrm:
DecodePSHUFBMask(C, Mask);
case X86::PSHUFBrm:
case X86::VPSHUFBrm:
DecodePSHUFBMask(C, Mask);
+ // Lower PSHUFB and VPERMILP normally but add a comment if we can find
+ // a constant shuffle mask. We won't be able to do this at the MC layer
+ // because the mask isn't an immediate.
case X86::PSHUFBrm:
case X86::VPSHUFBrm:
case X86::VPERMILPSrm:
case X86::VPERMILPDrm:
case X86::VPERMILPSYrm:
case X86::VPERMILPDYrm: {
case X86::PSHUFBrm:
case X86::VPSHUFBrm:
case X86::VPERMILPSrm:
case X86::VPERMILPDrm:
case X86::VPERMILPSYrm:
case X86::VPERMILPDYrm: {
- // Lower PSHUFB and VPERMILP normally but add a comment if we can find
- // a constant shuffle mask. We won't be able to do this at the MC layer
- // because the mask isn't an immediate.
- std::string Comment = getShuffleComment(*MI);
- OutStreamer.AddComment(Comment);
+ // All of these instructions accept a constant pool operand as their fifth.
+ assert(MI->getNumOperands() > 5 &&
+ "We should always have at least 5 operands!");
+ const MachineOperand &DstOp = MI->getOperand(0);
+ const MachineOperand &SrcOp = MI->getOperand(1);
+ const MachineOperand &MaskOp = MI->getOperand(5);
+
+ std::string Comment = getShuffleComment(
+ MI->getOpcode(), DstOp, SrcOp, MaskOp,
+ MI->getParent()->getParent()->getConstantPool()->getConstants());
+ if (!Comment.empty())
+ OutStreamer.AddComment(Comment);