worklist, as it may be possible to perform further optimization on them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140349
91177308-0d34-0410-b5e6-
96231b3b80d8
SDValue Cond = DAG.getSetCC(DL,
TLI.getSetCCResultType(N0.getValueType()),
N0, N1, CC);
SDValue Cond = DAG.getSetCC(DL,
TLI.getSetCCResultType(N0.getValueType()),
N0, N1, CC);
+ AddToWorkList(Cond.getNode());
SDValue CstOffset = DAG.getNode(ISD::SELECT, DL, Zero.getValueType(),
Cond, One, Zero);
SDValue CstOffset = DAG.getNode(ISD::SELECT, DL, Zero.getValueType(),
Cond, One, Zero);
+ AddToWorkList(CstOffset.getNode());
CPIdx = DAG.getNode(ISD::ADD, DL, TLI.getPointerTy(), CPIdx,
CstOffset);
CPIdx = DAG.getNode(ISD::ADD, DL, TLI.getPointerTy(), CPIdx,
CstOffset);
+ AddToWorkList(CPIdx.getNode());
return DAG.getLoad(TV->getValueType(0), DL, DAG.getEntryNode(), CPIdx,
MachinePointerInfo::getConstantPool(), false,
false, Alignment);
return DAG.getLoad(TV->getValueType(0), DL, DAG.getEntryNode(), CPIdx,
MachinePointerInfo::getConstantPool(), false,
false, Alignment);
; block generated, odds are good that we have close to the ideal code for this:
;
; CHECK-NEON: _f8:
; block generated, odds are good that we have close to the ideal code for this:
;
; CHECK-NEON: _f8:
-; CHECK-NEON: movw [[REGISTER_1:r[0-9]+]], #1123
-; CHECK-NEON-NEXT: movs [[REGISTER_2:r[0-9]+]], #0
-; CHECK-NEON-NEXT: cmp r0, [[REGISTER_1]]
-; CHECK-NEON-NEXT: it eq
-; CHECK-NEON-NEXT: moveq [[REGISTER_2]], #4
-; CHECK-NEON-NEXT: adr [[REGISTER_3:r[0-9]+]], LCPI
+; CHECK-NEON: adr r2, LCPI7_0
+; CHECK-NEON-NEXT: movw r3, #1123
+; CHECK-NEON-NEXT: adds r1, r2, #4
+; CHECK-NEON-NEXT: cmp r0, r3
+; CHECK-NEON-NEXT: it ne
+; CHECK-NEON-NEXT: movne r1, r2
; CHECK-NEON-NEXT: ldr
; CHECK-NEON: bx
; CHECK-NEON-NEXT: ldr
; CHECK-NEON: bx