+
+ if (of_machine_is_compatible("rockchip,rk3288w")) {
+ clk = clk_register_divider(NULL, "hclk_vio", "aclk_vio1", 0,
+ ctx->reg_base + RK3288_CLKSEL_CON(28), 8, 5,
+ DFLAGS, &ctx->lock);
+ } else {
+ clk = clk_register_divider(NULL, "hclk_vio", "aclk_vio0", 0,
+ ctx->reg_base + RK3288_CLKSEL_CON(28), 8, 5,
+ DFLAGS, &ctx->lock);
+ }
+ if (IS_ERR(clk))
+ pr_warn("%s: could not register clock hclk_vio: %ld\n",
+ __func__, PTR_ERR(clk));
+ else
+ rockchip_clk_add_lookup(ctx, clk, HCLK_VIO);