"revsh", " $dst, $src",
[(set tGPR:$dst,
(sext_inreg
"revsh", " $dst, $src",
[(set tGPR:$dst,
(sext_inreg
- (or (srl (and tGPR:$src, 0xFFFF), (i32 8)),
+ (or (srl (and tGPR:$src, 0xFF00), (i32 8)),
(shl tGPR:$src, (i32 8))), i16))]>,
Requires<[IsThumb1Only, HasV6]>;
(shl tGPR:$src, (i32 8))), i16))]>,
Requires<[IsThumb1Only, HasV6]>;
"revsh", ".w $dst, $src",
[(set GPR:$dst,
(sext_inreg
"revsh", ".w $dst, $src",
[(set GPR:$dst,
(sext_inreg
- (or (srl (and GPR:$src, 0xFFFF), (i32 8)),
+ (or (srl (and GPR:$src, 0xFF00), (i32 8)),
(shl GPR:$src, (i32 8))), i16))]>;
def t2PKHBT : T2I<(outs GPR:$dst), (ins GPR:$src1, GPR:$src2, i32imm:$shamt),
(shl GPR:$src, (i32 8))), i16))]>;
def t2PKHBT : T2I<(outs GPR:$dst), (ins GPR:$src1, GPR:$src2, i32imm:$shamt),
}
declare i32 @llvm.bswap.i32(i32) nounwind readnone
}
declare i32 @llvm.bswap.i32(i32) nounwind readnone
+
+define i32 @f2(i32 %X) {
+; CHECK: f2:
+; CHECK: revsh r0, r0
+ %tmp1 = lshr i32 %X, 8
+ %tmp1.upgrd.1 = trunc i32 %tmp1 to i16
+ %tmp3 = trunc i32 %X to i16
+ %tmp2 = and i16 %tmp1.upgrd.1, 255
+ %tmp4 = shl i16 %tmp3, 8
+ %tmp5 = or i16 %tmp2, %tmp4
+ %tmp5.upgrd.2 = sext i16 %tmp5 to i32
+ ret i32 %tmp5.upgrd.2
+}