3368 is vpu & hevc combo platform which have a virtual master device
and two sub devcie - vpu_service & hevc_service. There is a flag in
grf, driver need write or erase this flag when switch mode.
since shutdown function only be called on virtual master device, we
need to call into both vpu and hevc device.
Change-Id: I56ad28dbbc7cc380204fb7d0da11d93b5ace9469
Signed-off-by: Jung Zhao <jung.zhao@rock-chips.com>
kfree(drm_buffer);
session_info->buffer_nums--;
vpu_iommu_debug(session_info->debug_level, DEBUG_IOMMU_NORMAL,
kfree(drm_buffer);
session_info->buffer_nums--;
vpu_iommu_debug(session_info->debug_level, DEBUG_IOMMU_NORMAL,
- "buffer nums %d\n", session_info->buffer_nums);
+ "buffer nums %d\n", session_info->buffer_nums);
}
mutex_unlock(&session_info->list_mutex);
}
mutex_unlock(&session_info->list_mutex);
kfree(drm_buffer);
session_info->buffer_nums--;
vpu_iommu_debug(session_info->debug_level, DEBUG_IOMMU_NORMAL,
kfree(drm_buffer);
session_info->buffer_nums--;
vpu_iommu_debug(session_info->debug_level, DEBUG_IOMMU_NORMAL,
- "buffer nums %d\n", session_info->buffer_nums);
+ "buffer nums %d\n", session_info->buffer_nums);
}
mutex_unlock(&session_info->list_mutex);
}
mutex_unlock(&session_info->list_mutex);
struct vpu_service_info *pservice = data->pservice;
list_for_each_entry_safe(reg, n, &pservice->waiting, status_link) {
struct vpu_service_info *pservice = data->pservice;
list_for_each_entry_safe(reg, n, &pservice->waiting, status_link) {
+ reg_deinit(reg->data, reg);
}
/* wake up session wait event to prevent the timeout hw reset
}
/* wake up session wait event to prevent the timeout hw reset
pservice->reg_codec = reg;
pservice->reg_codec = reg;
- vpu_debug(DEBUG_TASK_INFO, "reg: base %3d end %d en %2d mask: en %x gate %x\n",
+ vpu_debug(DEBUG_TASK_INFO,
+ "reg: base %3d end %d en %2d mask: en %x gate %x\n",
base, end, reg_en, enable_mask, gating_mask);
VEPU_CLEAN_CACHE(dst);
base, end, reg_en, enable_mask, gating_mask);
VEPU_CLEAN_CACHE(dst);
pservice->reg_codec = reg;
pservice->reg_codec = reg;
- vpu_debug(DEBUG_TASK_INFO, "reg: base %3d end %d en %2d mask: en %x gate %x\n",
+ vpu_debug(DEBUG_TASK_INFO,
+ "reg: base %3d end %d en %2d mask: en %x gate %x\n",
base, end, reg_en, enable_mask, gating_mask);
VDPU_CLEAN_CACHE(dst);
base, end, reg_en, enable_mask, gating_mask);
VDPU_CLEAN_CACHE(dst);
pservice->reg_pproc = reg;
pservice->reg_pproc = reg;
- vpu_debug(DEBUG_TASK_INFO, "reg: base %3d end %d en %2d mask: en %x gate %x\n",
+ vpu_debug(DEBUG_TASK_INFO,
+ "reg: base %3d end %d en %2d mask: en %x gate %x\n",
base, end, reg_en, enable_mask, gating_mask);
if (debug & DEBUG_SET_REG)
base, end, reg_en, enable_mask, gating_mask);
if (debug & DEBUG_SET_REG)
pservice->reg_codec = reg;
pservice->reg_pproc = reg;
pservice->reg_codec = reg;
pservice->reg_pproc = reg;
- vpu_debug(DEBUG_TASK_INFO, "reg: base %3d end %d en %2d mask: en %x gate %x\n",
+ vpu_debug(DEBUG_TASK_INFO,
+ "reg: base %3d end %d en %2d mask: en %x gate %x\n",
base, end, reg_en, enable_mask, gating_mask);
/* VDPU_SOFT_RESET(dst); */
base, end, reg_en, enable_mask, gating_mask);
/* VDPU_SOFT_RESET(dst); */
&pservice->total_running);
dev_err(pservice->dev,
"%d task is running but not return, reset hardware...",
&pservice->total_running);
dev_err(pservice->dev,
"%d task is running but not return, reset hardware...",
vpu_reset(data);
dev_err(pservice->dev, "done\n");
}
vpu_reset(data);
dev_err(pservice->dev, "done\n");
}
clear_bit(MMU_ACTIVATED, &data->state);
vpu_service_power_on(data, pservice);
clear_bit(MMU_ACTIVATED, &data->state);
vpu_service_power_on(data, pservice);
+ vcodec_enter_mode(data);
ret = vpu_service_check_hw(data);
if (ret < 0) {
vpu_err("error: hw info check faild\n");
ret = vpu_service_check_hw(data);
if (ret < 0) {
vpu_err("error: hw info check faild\n");
atomic_set(&data->enc_dev.irq_count_codec, 0);
atomic_set(&data->enc_dev.irq_count_pp, 0);
atomic_set(&data->enc_dev.irq_count_codec, 0);
atomic_set(&data->enc_dev.irq_count_pp, 0);
- vcodec_enter_mode(data);
of_property_read_u32(np, "allocator", (u32 *)&pservice->alloc_type);
data->iommu_info = vcodec_iommu_info_create(dev, data->mmu_dev,
pservice->alloc_type);
of_property_read_u32(np, "allocator", (u32 *)&pservice->alloc_type);
data->iommu_info = vcodec_iommu_info_create(dev, data->mmu_dev,
pservice->alloc_type);
pm_runtime_enable(dev);
if (of_property_read_bool(np, "subcnt")) {
pm_runtime_enable(dev);
if (of_property_read_bool(np, "subcnt")) {
+ struct vpu_subdev_data *data = NULL;
+
+ data = devm_kzalloc(dev, sizeof(struct vpu_subdev_data),
+ GFP_KERNEL);
+ if (!data)
+ return -ENOMEM;
+
for (i = 0; i < pservice->subcnt; i++) {
struct device_node *sub_np;
struct platform_device *sub_pdev;
for (i = 0; i < pservice->subcnt; i++) {
struct device_node *sub_np;
struct platform_device *sub_pdev;
vcodec_subdev_probe(sub_pdev, pservice);
}
vcodec_subdev_probe(sub_pdev, pservice);
}
+ data->pservice = pservice;
+ platform_set_drvdata(pdev, data);
} else {
vcodec_subdev_probe(pdev, pservice);
}
} else {
vcodec_subdev_probe(pdev, pservice);
}
{
struct vpu_subdev_data *data = platform_get_drvdata(pdev);
struct vpu_service_info *pservice = data->pservice;
{
struct vpu_subdev_data *data = platform_get_drvdata(pdev);
struct vpu_service_info *pservice = data->pservice;
+ struct device_node *np = pdev->dev.of_node;
dev_info(&pdev->dev, "vcodec shutdown");
dev_info(&pdev->dev, "vcodec shutdown");
- vpu_service_power_on(data, pservice);
- vcodec_subdev_remove(data);
+ if (of_property_read_bool(np, "subcnt")) {
+ for (i = 0; i < pservice->subcnt; i++) {
+ struct device_node *sub_np;
+ struct platform_device *sub_pdev;
+
+ sub_np = of_parse_phandle(np, "rockchip,sub", i);
+ sub_pdev = of_find_device_by_node(sub_np);
+
+ vcodec_subdev_remove(platform_get_drvdata(sub_pdev));
+ }
+
+ } else {
+ vcodec_subdev_remove(data);
+ }
pm_runtime_disable(&pdev->dev);
}
pm_runtime_disable(&pdev->dev);
}
}
pservice->auto_freq = true;
}
pservice->auto_freq = true;
- vpu_debug(DEBUG_EXTRA_INFO, "vpu_service set to auto frequency mode\n");
+ vpu_debug(DEBUG_EXTRA_INFO,
+ "vpu_service set to auto frequency mode\n");
atomic_set(&pservice->freq_status, VPU_FREQ_BUT);
pservice->bug_dec_addr = of_machine_is_compatible
atomic_set(&pservice->freq_status, VPU_FREQ_BUT);
pservice->bug_dec_addr = of_machine_is_compatible
raw_status = readl_relaxed(dev->regs + task->reg_irq);
dec_status = raw_status;
raw_status = readl_relaxed(dev->regs + task->reg_irq);
dec_status = raw_status;
- vpu_debug(DEBUG_TASK_INFO, "vdpu_irq reg %d status %x mask: irq %x ready %x error %0x\n",
+ vpu_debug(DEBUG_TASK_INFO,
+ "vdpu_irq reg %d status %x mask: irq %x ready %x error %0x\n",
task->reg_irq, dec_status,
task->irq_mask, task->ready_mask, task->error_mask);
task->reg_irq, dec_status,
task->irq_mask, task->ready_mask, task->error_mask);
irq_status = readl_relaxed(dev->regs + task->reg_irq);
irq_status = readl_relaxed(dev->regs + task->reg_irq);
- vpu_debug(DEBUG_TASK_INFO, "vepu_irq reg %d status %x mask: irq %x ready %x error %0x\n",
+ vpu_debug(DEBUG_TASK_INFO,
+ "vepu_irq reg %d status %x mask: irq %x ready %x error %0x\n",
task->reg_irq, irq_status,
task->irq_mask, task->ready_mask, task->error_mask);
task->reg_irq, irq_status,
task->irq_mask, task->ready_mask, task->error_mask);