+; D, in little endian the source reg will be 4 bytes into the long long
+;LITTLE: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
+;LITTLE: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
+;LITTLE-NEXT: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
+;LITTLE: #APP
+;LITTLE: or ${{[0-9]+}},$[[SECOND]],${{[0-9]+}}
+;LITTLE: #NO_APP
+
+; D, in big endian the source reg will also be 4 bytes into the long long
+;BIG: #APP
+;BIG: #APP
+;BIG: #APP
+;BIG: #APP
+;BIG: #APP
+;BIG: #APP
+;BIG: #APP
+;BIG: lw ${{[0-9]+}}, %got(uval)(${{[0-9,a-z]+}})
+;BIG: lw $[[SECOND:[0-9]+]], 4(${{[0-9]+}})
+;BIG-NEXT: lw $[[FIRST:[0-9]+]], 0(${{[0-9]+}})
+;BIG: #APP
+;BIG: or ${{[0-9]+}},$[[SECOND]],${{[0-9]+}}
+;BIG: #NO_APP
+ %7 = load i64* getelementptr inbounds (%union.u_tag* @uval, i32 0, i32 0), align 8
+ %trunc1 = trunc i64 %7 to i32
+ tail call i32 asm sideeffect "or $0,${1:D},$2", "=r,r,r"(i64 %7, i32 %trunc1) nounwind
+