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Fix the previous accidental commit. Now shrinking common Thumb2 load / store instruct...
author
Evan Cheng
<evan.cheng@apple.com>
Tue, 11 Aug 2009 09:37:40 +0000
(09:37 +0000)
committer
Evan Cheng
<evan.cheng@apple.com>
Tue, 11 Aug 2009 09:37:40 +0000
(09:37 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78659
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
patch
|
blob
|
history
lib/Target/ARM/Thumb2SizeReduction.cpp
patch
|
blob
|
history
test/CodeGen/Thumb2/2009-08-01-WrongLDRBOpc.ll
patch
|
blob
|
history
test/CodeGen/Thumb2/thumb2-ldr.ll
patch
|
blob
|
history
test/CodeGen/Thumb2/thumb2-ldrb.ll
patch
|
blob
|
history
test/CodeGen/Thumb2/thumb2-ldrh.ll
patch
|
blob
|
history
test/CodeGen/Thumb2/thumb2-str.ll
patch
|
blob
|
history
test/CodeGen/Thumb2/thumb2-strb.ll
patch
|
blob
|
history
test/CodeGen/Thumb2/thumb2-strh.ll
patch
|
blob
|
history
diff --git
a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
index 43348103b2c7eb37332b9e32552d5e3192af64b3..02ced4451f948e032ce48abb7c12b72800758d41 100644
(file)
--- a/
lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
+++ b/
lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
@@
-850,7
+850,7
@@
void ARMAsmPrinter::printT2AddrModeSoRegOperand(const MachineInstr *MI,
O << "[" << TRI->getAsmName(MO1.getReg());
assert(MO2.getReg() && "Invalid so_reg load / store address!");
O << "[" << TRI->getAsmName(MO1.getReg());
assert(MO2.getReg() && "Invalid so_reg load / store address!");
- O << ",
+
" << TRI->getAsmName(MO2.getReg());
+ O << ", " << TRI->getAsmName(MO2.getReg());
unsigned ShAmt = MO3.getImm();
if (ShAmt) {
unsigned ShAmt = MO3.getImm();
if (ShAmt) {
diff --git
a/lib/Target/ARM/Thumb2SizeReduction.cpp
b/lib/Target/ARM/Thumb2SizeReduction.cpp
index 2812cd38ff329b4e6b420eeb5c2557bb1637f091..a9fb95a35eb8abac53a22971dedd43ca4edd7d8f 100644
(file)
--- a/
lib/Target/ARM/Thumb2SizeReduction.cpp
+++ b/
lib/Target/ARM/Thumb2SizeReduction.cpp
@@
-94,7
+94,7
@@
namespace {
{ ARM::t2LDRBs, ARM::tLDRB, 0, 0, 0, 1, 0, 0,0, 1 },
{ ARM::t2LDRHi12,ARM::tLDRH, 0, 5, 0, 1, 0, 0,0, 1 },
{ ARM::t2LDRHs, ARM::tLDRH, 0, 0, 0, 1, 0, 0,0, 1 },
{ ARM::t2LDRBs, ARM::tLDRB, 0, 0, 0, 1, 0, 0,0, 1 },
{ ARM::t2LDRHi12,ARM::tLDRH, 0, 5, 0, 1, 0, 0,0, 1 },
{ ARM::t2LDRHs, ARM::tLDRH, 0, 0, 0, 1, 0, 0,0, 1 },
- { ARM::t2LDRSBs,ARM::tLDR
,
0, 0, 0, 1, 0, 0,0, 1 },
+ { ARM::t2LDRSBs,ARM::tLDR
SB,
0, 0, 0, 1, 0, 0,0, 1 },
{ ARM::t2LDRSHs,ARM::tLDRSH, 0, 0, 0, 1, 0, 0,0, 1 },
{ ARM::t2STRi12,ARM::tSTR, 0, 5, 0, 1, 0, 0,0, 1 },
{ ARM::t2STRs, ARM::tSTR, 0, 0, 0, 1, 0, 0,0, 1 },
{ ARM::t2LDRSHs,ARM::tLDRSH, 0, 0, 0, 1, 0, 0,0, 1 },
{ ARM::t2STRi12,ARM::tSTR, 0, 5, 0, 1, 0, 0,0, 1 },
{ ARM::t2STRs, ARM::tSTR, 0, 0, 0, 1, 0, 0,0, 1 },
@@
-248,10
+248,12
@@
Thumb2SizeReduce::ReduceLoadStore(MachineBasicBlock &MBB, MachineInstr *MI,
if (Entry.NarrowOpc1 != ARM::tLDRSB && Entry.NarrowOpc1 != ARM::tLDRSH) {
// tLDRSB and tLDRSH do not have an immediate offset field. On the other
// hand, it must have an offset register.
if (Entry.NarrowOpc1 != ARM::tLDRSB && Entry.NarrowOpc1 != ARM::tLDRSH) {
// tLDRSB and tLDRSH do not have an immediate offset field. On the other
// hand, it must have an offset register.
- assert(OffsetReg && "Invalid so_reg load / store address!");
// FIXME: Remove this special case.
MIB.addImm(OffsetImm/Scale);
}
// FIXME: Remove this special case.
MIB.addImm(OffsetImm/Scale);
}
+
+ assert((!HasShift || OffsetReg) && "Invalid so_reg load / store address!");
+
MIB.addReg(OffsetReg, getKillRegState(OffsetKill));
// Transfer the rest of operands.
MIB.addReg(OffsetReg, getKillRegState(OffsetKill));
// Transfer the rest of operands.
diff --git
a/test/CodeGen/Thumb2/2009-08-01-WrongLDRBOpc.ll
b/test/CodeGen/Thumb2/2009-08-01-WrongLDRBOpc.ll
index e05e21e8a43012e53e929db0e7de63a75ee61129..5a5965442fe8d931171645623e9b03b45d4a379f 100644
(file)
--- a/
test/CodeGen/Thumb2/2009-08-01-WrongLDRBOpc.ll
+++ b/
test/CodeGen/Thumb2/2009-08-01-WrongLDRBOpc.ll
@@
-8,7
+8,7
@@
define arm_apcscc void @main(i32 %argc, i8** %argv) noreturn nounwind {
; CHECK: main:
define arm_apcscc void @main(i32 %argc, i8** %argv) noreturn nounwind {
; CHECK: main:
-; CHECK: ldrb
.w
+; CHECK: ldrb
entry:
%nb.i.i.i = alloca [25 x i8], align 1 ; <[25 x i8]*> [#uses=0]
%line.i.i.i = alloca [200 x i8], align 1 ; <[200 x i8]*> [#uses=1]
entry:
%nb.i.i.i = alloca [25 x i8], align 1 ; <[25 x i8]*> [#uses=0]
%line.i.i.i = alloca [200 x i8], align 1 ; <[200 x i8]*> [#uses=1]
diff --git
a/test/CodeGen/Thumb2/thumb2-ldr.ll
b/test/CodeGen/Thumb2/thumb2-ldr.ll
index 8609ff7d2ea85f04273bbe73e478afe2910e670a..ef9fb9e0eb4a5d709436bcd8e5ee99a7e385c1de 100644
(file)
--- a/
test/CodeGen/Thumb2/thumb2-ldr.ll
+++ b/
test/CodeGen/Thumb2/thumb2-ldr.ll
@@
-3,7
+3,7
@@
define i32 @f1(i32* %v) {
entry:
; CHECK: f1:
define i32 @f1(i32* %v) {
entry:
; CHECK: f1:
-; CHECK: ldr
.w
r0, [r0]
+; CHECK: ldr r0, [r0]
%tmp = load i32* %v
ret i32 %tmp
}
%tmp = load i32* %v
ret i32 %tmp
}
@@
-21,7
+21,7
@@
define i32 @f3(i32* %v) {
entry:
; CHECK: f3:
; CHECK: mov.w r1, #4096
entry:
; CHECK: f3:
; CHECK: mov.w r1, #4096
-; CHECK: ldr
.w r0, [r0, +
r1]
+; CHECK: ldr
r0, [r0,
r1]
%tmp2 = getelementptr i32* %v, i32 1024
%tmp = load i32* %tmp2
ret i32 %tmp
%tmp2 = getelementptr i32* %v, i32 1024
%tmp = load i32* %tmp2
ret i32 %tmp
@@
-40,7
+40,7
@@
entry:
define i32 @f5(i32 %base, i32 %offset) {
entry:
; CHECK: f5:
define i32 @f5(i32 %base, i32 %offset) {
entry:
; CHECK: f5:
-; CHECK: ldr
.w r0, [r0, +
r1]
+; CHECK: ldr
r0, [r0,
r1]
%tmp1 = add i32 %base, %offset
%tmp2 = inttoptr i32 %tmp1 to i32*
%tmp3 = load i32* %tmp2
%tmp1 = add i32 %base, %offset
%tmp2 = inttoptr i32 %tmp1 to i32*
%tmp3 = load i32* %tmp2
@@
-50,7
+50,7
@@
entry:
define i32 @f6(i32 %base, i32 %offset) {
entry:
; CHECK: f6:
define i32 @f6(i32 %base, i32 %offset) {
entry:
; CHECK: f6:
-; CHECK: ldr.w r0, [r0,
+
r1, lsl #2]
+; CHECK: ldr.w r0, [r0, r1, lsl #2]
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i32*
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i32*
@@
-62,7
+62,7
@@
define i32 @f7(i32 %base, i32 %offset) {
entry:
; CHECK: f7:
; CHECK: lsrs r1, r1, #2
entry:
; CHECK: f7:
; CHECK: lsrs r1, r1, #2
-; CHECK: ldr
.w r0, [r0, +
r1]
+; CHECK: ldr
r0, [r0,
r1]
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
diff --git
a/test/CodeGen/Thumb2/thumb2-ldrb.ll
b/test/CodeGen/Thumb2/thumb2-ldrb.ll
index 7f402c8774b0179d8f64d3dd4ef3c7d6cbb0ed89..4fae85bf27503278aaed42ec4c0c6506746de191 100644
(file)
--- a/
test/CodeGen/Thumb2/thumb2-ldrb.ll
+++ b/
test/CodeGen/Thumb2/thumb2-ldrb.ll
@@
-3,7
+3,7
@@
define i8 @f1(i8* %v) {
entry:
; CHECK: f1:
define i8 @f1(i8* %v) {
entry:
; CHECK: f1:
-; CHECK: ldrb
.w
r0, [r0]
+; CHECK: ldrb r0, [r0]
%tmp = load i8* %v
ret i8 %tmp
}
%tmp = load i8* %v
ret i8 %tmp
}
@@
-21,7
+21,7
@@
define i8 @f3(i32 %base) {
entry:
; CHECK: f3:
; CHECK: mov.w r1, #4096
entry:
; CHECK: f3:
; CHECK: mov.w r1, #4096
-; CHECK: ldrb
.w r0, [r0, +
r1]
+; CHECK: ldrb
r0, [r0,
r1]
%tmp1 = add i32 %base, 4096
%tmp2 = inttoptr i32 %tmp1 to i8*
%tmp3 = load i8* %tmp2
%tmp1 = add i32 %base, 4096
%tmp2 = inttoptr i32 %tmp1 to i8*
%tmp3 = load i8* %tmp2
@@
-41,7
+41,7
@@
entry:
define i8 @f5(i32 %base, i32 %offset) {
entry:
; CHECK: f5:
define i8 @f5(i32 %base, i32 %offset) {
entry:
; CHECK: f5:
-; CHECK: ldrb
.w r0, [r0, +
r1]
+; CHECK: ldrb
r0, [r0,
r1]
%tmp1 = add i32 %base, %offset
%tmp2 = inttoptr i32 %tmp1 to i8*
%tmp3 = load i8* %tmp2
%tmp1 = add i32 %base, %offset
%tmp2 = inttoptr i32 %tmp1 to i8*
%tmp3 = load i8* %tmp2
@@
-51,7
+51,7
@@
entry:
define i8 @f6(i32 %base, i32 %offset) {
entry:
; CHECK: f6:
define i8 @f6(i32 %base, i32 %offset) {
entry:
; CHECK: f6:
-; CHECK: ldrb.w r0, [r0,
+
r1, lsl #2]
+; CHECK: ldrb.w r0, [r0, r1, lsl #2]
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i8*
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i8*
@@
-63,7
+63,7
@@
define i8 @f7(i32 %base, i32 %offset) {
entry:
; CHECK: f7:
; CHECK: lsrs r1, r1, #2
entry:
; CHECK: f7:
; CHECK: lsrs r1, r1, #2
-; CHECK: ldrb
.w r0, [r0, +
r1]
+; CHECK: ldrb
r0, [r0,
r1]
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i8*
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i8*
diff --git
a/test/CodeGen/Thumb2/thumb2-ldrh.ll
b/test/CodeGen/Thumb2/thumb2-ldrh.ll
index 3043940fccbef49d6932f25c98c4b20d6f661e97..19935245e71296f514ea11d54b23f39436607c2d 100644
(file)
--- a/
test/CodeGen/Thumb2/thumb2-ldrh.ll
+++ b/
test/CodeGen/Thumb2/thumb2-ldrh.ll
@@
-3,7
+3,7
@@
define i16 @f1(i16* %v) {
entry:
; CHECK: f1:
define i16 @f1(i16* %v) {
entry:
; CHECK: f1:
-; CHECK: ldrh
.w
r0, [r0]
+; CHECK: ldrh r0, [r0]
%tmp = load i16* %v
ret i16 %tmp
}
%tmp = load i16* %v
ret i16 %tmp
}
@@
-21,7
+21,7
@@
define i16 @f3(i16* %v) {
entry:
; CHECK: f3:
; CHECK: mov.w r1, #4096
entry:
; CHECK: f3:
; CHECK: mov.w r1, #4096
-; CHECK: ldrh
.w r0, [r0, +
r1]
+; CHECK: ldrh
r0, [r0,
r1]
%tmp2 = getelementptr i16* %v, i16 2048
%tmp = load i16* %tmp2
ret i16 %tmp
%tmp2 = getelementptr i16* %v, i16 2048
%tmp = load i16* %tmp2
ret i16 %tmp
@@
-40,7
+40,7
@@
entry:
define i16 @f5(i32 %base, i32 %offset) {
entry:
; CHECK: f5:
define i16 @f5(i32 %base, i32 %offset) {
entry:
; CHECK: f5:
-; CHECK: ldrh
.w r0, [r0, +
r1]
+; CHECK: ldrh
r0, [r0,
r1]
%tmp1 = add i32 %base, %offset
%tmp2 = inttoptr i32 %tmp1 to i16*
%tmp3 = load i16* %tmp2
%tmp1 = add i32 %base, %offset
%tmp2 = inttoptr i32 %tmp1 to i16*
%tmp3 = load i16* %tmp2
@@
-50,7
+50,7
@@
entry:
define i16 @f6(i32 %base, i32 %offset) {
entry:
; CHECK: f6:
define i16 @f6(i32 %base, i32 %offset) {
entry:
; CHECK: f6:
-; CHECK: ldrh.w r0, [r0,
+
r1, lsl #2]
+; CHECK: ldrh.w r0, [r0, r1, lsl #2]
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i16*
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i16*
@@
-62,7
+62,7
@@
define i16 @f7(i32 %base, i32 %offset) {
entry:
; CHECK: f7:
; CHECK: lsrs r1, r1, #2
entry:
; CHECK: f7:
; CHECK: lsrs r1, r1, #2
-; CHECK: ldrh
.w r0, [r0, +
r1]
+; CHECK: ldrh
r0, [r0,
r1]
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i16*
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i16*
diff --git
a/test/CodeGen/Thumb2/thumb2-str.ll
b/test/CodeGen/Thumb2/thumb2-str.ll
index b46935e1f880d100c9896b083dbe78f6071deab1..10c6f87372e2b00bb1c52c6cc4b40397ea8f1382 100644
(file)
--- a/
test/CodeGen/Thumb2/thumb2-str.ll
+++ b/
test/CodeGen/Thumb2/thumb2-str.ll
@@
-1,28
+1,32
@@
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#-128\\\]$} | count 2
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {str\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$}
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {str\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i32 @f1(i32 %a, i32* %v) {
define i32 @f1(i32 %a, i32* %v) {
+; CHECK: f1:
+; CHECK: str r0, [r1]
store i32 %a, i32* %v
ret i32 %a
}
define i32 @f2(i32 %a, i32* %v) {
store i32 %a, i32* %v
ret i32 %a
}
define i32 @f2(i32 %a, i32* %v) {
+; CHECK: f2:
+; CHECK: str.w r0, [r1, #+4092]
%tmp2 = getelementptr i32* %v, i32 1023
store i32 %a, i32* %tmp2
ret i32 %a
}
define i32 @f2a(i32 %a, i32* %v) {
%tmp2 = getelementptr i32* %v, i32 1023
store i32 %a, i32* %tmp2
ret i32 %a
}
define i32 @f2a(i32 %a, i32* %v) {
+; CHECK: f2a:
+; CHECK: str r0, [r1, #-128]
%tmp2 = getelementptr i32* %v, i32 -32
store i32 %a, i32* %tmp2
ret i32 %a
}
define i32 @f3(i32 %a, i32* %v) {
%tmp2 = getelementptr i32* %v, i32 -32
store i32 %a, i32* %tmp2
ret i32 %a
}
define i32 @f3(i32 %a, i32* %v) {
+; CHECK: f3:
+; CHECK: mov.w r2, #4096
+; CHECK: str r0, [r1, r2]
%tmp2 = getelementptr i32* %v, i32 1024
store i32 %a, i32* %tmp2
ret i32 %a
%tmp2 = getelementptr i32* %v, i32 1024
store i32 %a, i32* %tmp2
ret i32 %a
@@
-30,6
+34,8
@@
define i32 @f3(i32 %a, i32* %v) {
define i32 @f4(i32 %a, i32 %base) {
entry:
define i32 @f4(i32 %a, i32 %base) {
entry:
+; CHECK: f4:
+; CHECK: str r0, [r1, #-128]
%tmp1 = sub i32 %base, 128
%tmp2 = inttoptr i32 %tmp1 to i32*
store i32 %a, i32* %tmp2
%tmp1 = sub i32 %base, 128
%tmp2 = inttoptr i32 %tmp1 to i32*
store i32 %a, i32* %tmp2
@@
-38,6
+44,8
@@
entry:
define i32 @f5(i32 %a, i32 %base, i32 %offset) {
entry:
define i32 @f5(i32 %a, i32 %base, i32 %offset) {
entry:
+; CHECK: f5:
+; CHECK: str r0, [r1, r2]
%tmp1 = add i32 %base, %offset
%tmp2 = inttoptr i32 %tmp1 to i32*
store i32 %a, i32* %tmp2
%tmp1 = add i32 %base, %offset
%tmp2 = inttoptr i32 %tmp1 to i32*
store i32 %a, i32* %tmp2
@@
-46,6
+54,8
@@
entry:
define i32 @f6(i32 %a, i32 %base, i32 %offset) {
entry:
define i32 @f6(i32 %a, i32 %base, i32 %offset) {
entry:
+; CHECK: f6:
+; CHECK: str.w r0, [r1, r2, lsl #2]
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i32*
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i32*
@@
-55,6
+65,9
@@
entry:
define i32 @f7(i32 %a, i32 %base, i32 %offset) {
entry:
define i32 @f7(i32 %a, i32 %base, i32 %offset) {
entry:
+; CHECK: f7:
+; CHECK: lsrs r2, r2, #2
+; CHECK: str r0, [r1, r2]
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i32*
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i32*
diff --git
a/test/CodeGen/Thumb2/thumb2-strb.ll
b/test/CodeGen/Thumb2/thumb2-strb.ll
index ed43d494d017be480d07545fdd598cf8d0659ff1..e59f03733299e778c590aa6c52bceb9fb8e9114c 100644
(file)
--- a/
test/CodeGen/Thumb2/thumb2-strb.ll
+++ b/
test/CodeGen/Thumb2/thumb2-strb.ll
@@
-1,28
+1,32
@@
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#-128\\\]$} | count 2
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {strb\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$}
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strb\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i8 @f1(i8 %a, i8* %v) {
define i8 @f1(i8 %a, i8* %v) {
+; CHECK: f1:
+; CHECK: strb r0, [r1]
store i8 %a, i8* %v
ret i8 %a
}
define i8 @f2(i8 %a, i8* %v) {
store i8 %a, i8* %v
ret i8 %a
}
define i8 @f2(i8 %a, i8* %v) {
+; CHECK: f2:
+; CHECK: strb.w r0, [r1, #+4092]
%tmp2 = getelementptr i8* %v, i32 4092
store i8 %a, i8* %tmp2
ret i8 %a
}
define i8 @f2a(i8 %a, i8* %v) {
%tmp2 = getelementptr i8* %v, i32 4092
store i8 %a, i8* %tmp2
ret i8 %a
}
define i8 @f2a(i8 %a, i8* %v) {
+; CHECK: f2a:
+; CHECK: strb r0, [r1, #-128]
%tmp2 = getelementptr i8* %v, i32 -128
store i8 %a, i8* %tmp2
ret i8 %a
}
define i8 @f3(i8 %a, i8* %v) {
%tmp2 = getelementptr i8* %v, i32 -128
store i8 %a, i8* %tmp2
ret i8 %a
}
define i8 @f3(i8 %a, i8* %v) {
+; CHECK: f3:
+; CHECK: mov.w r2, #4096
+; CHECK: strb r0, [r1, r2]
%tmp2 = getelementptr i8* %v, i32 4096
store i8 %a, i8* %tmp2
ret i8 %a
%tmp2 = getelementptr i8* %v, i32 4096
store i8 %a, i8* %tmp2
ret i8 %a
@@
-30,6
+34,8
@@
define i8 @f3(i8 %a, i8* %v) {
define i8 @f4(i8 %a, i32 %base) {
entry:
define i8 @f4(i8 %a, i32 %base) {
entry:
+; CHECK: f4:
+; CHECK: strb r0, [r1, #-128]
%tmp1 = sub i32 %base, 128
%tmp2 = inttoptr i32 %tmp1 to i8*
store i8 %a, i8* %tmp2
%tmp1 = sub i32 %base, 128
%tmp2 = inttoptr i32 %tmp1 to i8*
store i8 %a, i8* %tmp2
@@
-38,6
+44,8
@@
entry:
define i8 @f5(i8 %a, i32 %base, i32 %offset) {
entry:
define i8 @f5(i8 %a, i32 %base, i32 %offset) {
entry:
+; CHECK: f5:
+; CHECK: strb r0, [r1, r2]
%tmp1 = add i32 %base, %offset
%tmp2 = inttoptr i32 %tmp1 to i8*
store i8 %a, i8* %tmp2
%tmp1 = add i32 %base, %offset
%tmp2 = inttoptr i32 %tmp1 to i8*
store i8 %a, i8* %tmp2
@@
-46,6
+54,8
@@
entry:
define i8 @f6(i8 %a, i32 %base, i32 %offset) {
entry:
define i8 @f6(i8 %a, i32 %base, i32 %offset) {
entry:
+; CHECK: f6:
+; CHECK: strb.w r0, [r1, r2, lsl #2]
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i8*
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i8*
@@
-55,6
+65,9
@@
entry:
define i8 @f7(i8 %a, i32 %base, i32 %offset) {
entry:
define i8 @f7(i8 %a, i32 %base, i32 %offset) {
entry:
+; CHECK: f7:
+; CHECK: lsrs r2, r2, #2
+; CHECK: strb r0, [r1, r2]
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i8*
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i8*
diff --git
a/test/CodeGen/Thumb2/thumb2-strh.ll
b/test/CodeGen/Thumb2/thumb2-strh.ll
index 28a33a493cf161f007f15f99d183de9712336500..d3925ffe4d34e464934d4506391914e4e0816482 100644
(file)
--- a/
test/CodeGen/Thumb2/thumb2-strh.ll
+++ b/
test/CodeGen/Thumb2/thumb2-strh.ll
@@
-1,28
+1,32
@@
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*\\\]$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4092\\\]$} | count 1
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#-128\\\]$} | count 2
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | not grep {strh\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*#+4096\\\]$}
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*\\\]$} | count 3
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep {strh\\.w\\W*r\[0-9\],\\W*\\\[r\[0-9\]*,\\W*+r\[0-9\]*,\\Wlsl #2\\\]$} | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
define i16 @f1(i16 %a, i16* %v) {
define i16 @f1(i16 %a, i16* %v) {
+; CHECK: f1:
+; CHECK: strh r0, [r1]
store i16 %a, i16* %v
ret i16 %a
}
define i16 @f2(i16 %a, i16* %v) {
store i16 %a, i16* %v
ret i16 %a
}
define i16 @f2(i16 %a, i16* %v) {
+; CHECK: f2:
+; CHECK: strh.w r0, [r1, #+4092]
%tmp2 = getelementptr i16* %v, i32 2046
store i16 %a, i16* %tmp2
ret i16 %a
}
define i16 @f2a(i16 %a, i16* %v) {
%tmp2 = getelementptr i16* %v, i32 2046
store i16 %a, i16* %tmp2
ret i16 %a
}
define i16 @f2a(i16 %a, i16* %v) {
+; CHECK: f2a:
+; CHECK: strh r0, [r1, #-128]
%tmp2 = getelementptr i16* %v, i32 -64
store i16 %a, i16* %tmp2
ret i16 %a
}
define i16 @f3(i16 %a, i16* %v) {
%tmp2 = getelementptr i16* %v, i32 -64
store i16 %a, i16* %tmp2
ret i16 %a
}
define i16 @f3(i16 %a, i16* %v) {
+; CHECK: f3:
+; CHECK: mov.w r2, #4096
+; CHECK: strh r0, [r1, r2]
%tmp2 = getelementptr i16* %v, i32 2048
store i16 %a, i16* %tmp2
ret i16 %a
%tmp2 = getelementptr i16* %v, i32 2048
store i16 %a, i16* %tmp2
ret i16 %a
@@
-30,6
+34,8
@@
define i16 @f3(i16 %a, i16* %v) {
define i16 @f4(i16 %a, i32 %base) {
entry:
define i16 @f4(i16 %a, i32 %base) {
entry:
+; CHECK: f4:
+; CHECK: strh r0, [r1, #-128]
%tmp1 = sub i32 %base, 128
%tmp2 = inttoptr i32 %tmp1 to i16*
store i16 %a, i16* %tmp2
%tmp1 = sub i32 %base, 128
%tmp2 = inttoptr i32 %tmp1 to i16*
store i16 %a, i16* %tmp2
@@
-38,6
+44,8
@@
entry:
define i16 @f5(i16 %a, i32 %base, i32 %offset) {
entry:
define i16 @f5(i16 %a, i32 %base, i32 %offset) {
entry:
+; CHECK: f5:
+; CHECK: strh r0, [r1, r2]
%tmp1 = add i32 %base, %offset
%tmp2 = inttoptr i32 %tmp1 to i16*
store i16 %a, i16* %tmp2
%tmp1 = add i32 %base, %offset
%tmp2 = inttoptr i32 %tmp1 to i16*
store i16 %a, i16* %tmp2
@@
-46,6
+54,8
@@
entry:
define i16 @f6(i16 %a, i32 %base, i32 %offset) {
entry:
define i16 @f6(i16 %a, i32 %base, i32 %offset) {
entry:
+; CHECK: f6:
+; CHECK: strh.w r0, [r1, r2, lsl #2]
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i16*
%tmp1 = shl i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i16*
@@
-55,6
+65,9
@@
entry:
define i16 @f7(i16 %a, i32 %base, i32 %offset) {
entry:
define i16 @f7(i16 %a, i32 %base, i32 %offset) {
entry:
+; CHECK: f7:
+; CHECK: lsrs r2, r2, #2
+; CHECK: strh r0, [r1, r2]
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i16*
%tmp1 = lshr i32 %offset, 2
%tmp2 = add i32 %base, %tmp1
%tmp3 = inttoptr i32 %tmp2 to i16*