; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s
; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s
target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32"
target triple = "msp430-generic-generic"
target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32"
target triple = "msp430-generic-generic"
; RUN: llc -march=msp430 < %s | FileCheck %s
; RUN: llc -march=msp430 < %s | FileCheck %s
target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32"
target triple = "msp430-generic-generic"
target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32"
target triple = "msp430-generic-generic"
ret i16 %t2
}
; CHECK:sccwne:
ret i16 %t2
}
; CHECK:sccwne:
; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: rra.w r15
; CHECK-NEXT: and.w #1, r15
; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: rra.w r15
; CHECK-NEXT: and.w #1, r15
ret i16 %t2
}
; CHECK:sccweq:
ret i16 %t2
}
; CHECK:sccweq:
; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: rra.w r15
; CHECK-NEXT: and.w #1, r15
; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: rra.w r15
; CHECK-NEXT: and.w #1, r15
ret i16 %t2
}
; CHECK:sccwugt:
ret i16 %t2
}
; CHECK:sccwugt:
; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: and.w #1, r15
; CHECK-NEXT: xor.w #1, r15
; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: and.w #1, r15
; CHECK-NEXT: xor.w #1, r15
ret i16 %t2
}
; CHECK:sccwuge:
ret i16 %t2
}
; CHECK:sccwuge:
; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: and.w #1, r15
; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: and.w #1, r15
ret i16 %t2
}
; CHECK:sccwult:
ret i16 %t2
}
; CHECK:sccwult:
; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: and.w #1, r15
; CHECK-NEXT: xor.w #1, r15
; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: and.w #1, r15
; CHECK-NEXT: xor.w #1, r15
ret i16 %t2
}
; CHECK:sccwule:
ret i16 %t2
}
; CHECK:sccwule:
; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: and.w #1, r15
; CHECK-NEXT: mov.w r2, r15
; CHECK-NEXT: and.w #1, r15