-<li>Dale finished up the Tail Merging optimization in the code generator, and
- enabled it by default. This produces smaller code that is also faster in
- some cases.</li>
-
-<li>Christopher Lamb implemented support for virtual register sub-registers,
- which can be used to better model many forms of subregisters. As an example
- use, he modified the X86 backend to use this to model truncates and
- extends more accurately (leading to better code).</li>
-
-<li>Dan Gohman changed the way we represent vectors before legalization,
- significantly simplifying the SelectionDAG representation for these and
- making the code generator faster for vector code.</li>
-
-<li>Evan contributed a new target independent if-converter. While it is
- target independent, so far only the ARM backend uses it.</li>
-
-<li>Evan rewrote the way the register allocator handles rematerialization,
- allowing it to be much more effective on two-address targets like X86,
- and taught it to fold loads away when possible (also a big win on X86).</li>
-
-<li>Dan Gohman contributed support for better alignment and volatility handling
- in the code generator, and significantly enhanced alignment analysis for SSE
- load/store instructions. With his changes, an insufficiently-aligned SSE
- load instruction turns into <tt>movups</tt>, for example.</li>
-
-<li>Duraid Madina contributed a new "bigblock" register allocator, and Roman
- Levenstein contributed several big improvements. BigBlock is optimized for
- code that uses very large basic blocks. It is slightly slower than the
- "local" allocator, but produces much better code.</li>
-
-<li>David Greene refactored the register allocator to split coalescing out from
- allocation, making coalescers pluggable.</li>